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Searched refs:ADC0_BASE (Results 1 – 25 of 93) sorted by relevance

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/bsp/tm4c129x/libraries/driverlib/
A Dadc.c108 ui8Int = ((ui32Base == ADC0_BASE) ? in _ADCIntNumberGet()
114 ui8Int = ((ui32Base == ADC0_BASE) ? in _ADCIntNumberGet()
156 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntRegister()
201 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntUnregister()
239 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntDisable()
962 if(ui32Base == ADC0_BASE) in ADCSoftwareOversampleConfigure()
1003 if(ui32Base == ADC0_BASE) in ADCSoftwareOversampleStepConfigure()
1106 if(ui32Base == ADC0_BASE) in ADCSoftwareOversampleDataGet()
1985 ASSERT(ui32Base == ADC0_BASE); in ADCClockConfigSet()
2044 ASSERT(ui32Base == ADC0_BASE); in ADCClockConfigGet()
[all …]
/bsp/lm4f232/Libraries/driverlib/
A Dadc.c95 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntRegister()
140 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntUnregister()
178 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntDisable()
207 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntEnable()
246 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntStatus()
307 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntClear()
335 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceEnable()
363 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceDisable()
436 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceConfigure()
530 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceStepConfigure()
[all …]
/bsp/lm3s9b9x/Libraries/driverlib/
A Dadc.c95 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntRegister()
140 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntUnregister()
178 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntDisable()
207 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntEnable()
246 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntStatus()
307 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntClear()
335 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceEnable()
363 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceDisable()
436 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceConfigure()
530 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceStepConfigure()
[all …]
/bsp/lm3s8962/Libraries/driverlib/
A Dadc.c95 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntRegister()
140 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntUnregister()
178 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntDisable()
207 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntEnable()
246 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntStatus()
307 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntClear()
335 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceEnable()
363 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceDisable()
436 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceConfigure()
530 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceStepConfigure()
[all …]
/bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/src/
A Dadc.c108 ui8Int = ((ui32Base == ADC0_BASE) ? in _ADCIntNumberGet()
114 ui8Int = ((ui32Base == ADC0_BASE) ? in _ADCIntNumberGet()
156 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntRegister()
201 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntUnregister()
239 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntDisable()
268 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntEnable()
306 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntStatus()
368 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntClear()
957 if(ui32Base == ADC0_BASE) in ADCSoftwareOversampleConfigure()
998 if(ui32Base == ADC0_BASE) in ADCSoftwareOversampleStepConfigure()
[all …]
/bsp/msp432e401y-LaunchPad/libraries/msp432e4/driverlib/
A Dadc.c103 ui8Int = ((ui32Base == ADC0_BASE) ? in _ADCIntNumberGet()
140 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntRegister()
185 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntUnregister()
223 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntDisable()
252 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntEnable()
290 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntStatus()
352 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntClear()
380 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceEnable()
905 if (ui32Base == ADC0_BASE) in ADCSoftwareOversampleConfigure()
946 if (ui32Base == ADC0_BASE) in ADCSoftwareOversampleStepConfigure()
[all …]
/bsp/tm4c123bsp/libraries/Drivers/config/
A Dadc_config.h23 .adcbase = ADC0_BASE, \
/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Include/
A Defm32g880f128.h294 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
336 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
A Defm32g880f32.h294 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
336 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
A Defm32g880f64.h294 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
336 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
A Defm32g890f128.h294 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
336 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
A Defm32g890f32.h294 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
336 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
A Defm32g890f64.h294 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
336 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
A Defm32g280f128.h333 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
374 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Include/
A Defm32gg990f512.h342 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
391 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
A Defm32gg995f1024.h342 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
391 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
A Defm32gg995f512.h342 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
391 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
A Defm32gg980f1024.h342 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
391 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
A Defm32gg980f512.h342 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
391 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
A Defm32gg990f1024.h342 #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ macro
391 #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */
/bsp/lm4f232/Libraries/inc/
A Dhw_memmap.h78 #define ADC0_BASE 0x40038000 // ADC0 macro
/bsp/lm3s8962/Libraries/inc/
A Dhw_memmap.h78 #define ADC0_BASE 0x40038000 // ADC0 macro
/bsp/lm3s9b9x/Libraries/inc/
A Dhw_memmap.h78 #define ADC0_BASE 0x40038000 // ADC0 macro
/bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/driverlib/inc/
A Dhw_memmap.h89 #define ADC0_BASE 0x40038000 // ADC0 macro
/bsp/tm4c129x/libraries/inc/
A Dhw_memmap.h89 #define ADC0_BASE 0x40038000 // ADC0 macro

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