Searched refs:ADC1_BASE (Results 1 – 25 of 82) sorted by relevance

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/bsp/lm4f232/Libraries/driverlib/
A D	adc.c	95 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntRegister() 140 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntUnregister() 178 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntDisable() 207 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntEnable() 246 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntStatus() 307 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntClear() 335 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceEnable() 363 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceDisable() 436 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceConfigure() 530 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceStepConfigure() [all …]
/bsp/lm3s9b9x/Libraries/driverlib/
A D	adc.c	95 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntRegister() 140 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntUnregister() 178 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntDisable() 207 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntEnable() 246 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntStatus() 307 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntClear() 335 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceEnable() 363 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceDisable() 436 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceConfigure() 530 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceStepConfigure() [all …]
/bsp/lm3s8962/Libraries/driverlib/
A D	adc.c	95 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntRegister() 140 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntUnregister() 178 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntDisable() 207 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntEnable() 246 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntStatus() 307 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntClear() 335 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceEnable() 363 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceDisable() 436 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceConfigure() 530 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceStepConfigure() [all …]
/bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/src/
A D	adc.c	156 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntRegister() 201 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntUnregister() 239 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntDisable() 268 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntEnable() 306 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntStatus() 368 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntClear() 396 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceEnable() 424 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceDisable() 510 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceConfigure() 622 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceStepConfigure() [all …]
/bsp/msp432e401y-LaunchPad/libraries/msp432e4/driverlib/
A D	adc.c	140 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntRegister() 185 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntUnregister() 223 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntDisable() 252 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntEnable() 290 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntStatus() 352 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntClear() 380 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceEnable() 408 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceDisable() 478 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceConfigure() 572 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceStepConfigure() [all …]
/bsp/tm4c129x/libraries/driverlib/
A D	adc.c	156 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntRegister() 201 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntUnregister() 239 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntDisable() 268 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntEnable() 306 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntStatus() 368 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntClear() 396 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceEnable() 424 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceDisable() 510 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceConfigure() 627 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceStepConfigure() [all …]
/bsp/tm4c123bsp/libraries/Drivers/config/
A D	adc_config.h	37 .adcbase = ADC1_BASE, \
/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/
A D	HAL_adc.h	74 #define IS_ADC_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \ 77 #define IS_ADC_DMA_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \
/bsp/lm4f232/Libraries/inc/
A D	hw_memmap.h	79 #define ADC1_BASE 0x40039000 // ADC1 macro
/bsp/lm3s8962/Libraries/inc/
A D	hw_memmap.h	79 #define ADC1_BASE 0x40039000 // ADC1 macro
/bsp/lm3s9b9x/Libraries/inc/
A D	hw_memmap.h	79 #define ADC1_BASE 0x40039000 // ADC1 macro
/bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/driverlib/inc/
A D	hw_memmap.h	90 #define ADC1_BASE 0x40039000 // ADC1 macro
/bsp/tm4c129x/libraries/inc/
A D	hw_memmap.h	90 #define ADC1_BASE 0x40039000 // ADC1 macro
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/inc/
A D	HAL_adc.h	73 #define IS_ADC_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \ 76 #define IS_ADC_DMA_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \
/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/inc/
A D	HAL_adc.h	73 #define IS_ADC_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \ 76 #define IS_ADC_DMA_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \
/bsp/tkm32F499/Libraries/Hal_lib/inc/
A D	HAL_adc.h	74 #define IS_ADC_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \ 77 #define IS_ADC_DMA_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/
A D	hal_adc.c	48 case ADC1_BASE: in ADC_DeInit() 226 return (*(vu32*)ADC1_BASE); in ADC_GetDualModeConversionValue()
A D	hal_rcc.c	822 case ADC1_BASE: in RCC_ADC_ClockCmd()
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/src/
A D	HAL_adc.c	142 case ADC1_BASE: in ADC_DeInit()
/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/src/
A D	HAL_adc.c	142 case ADC1_BASE: in ADC_DeInit()
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A D	reg_adc.h	45 #define ADC1_BASE (APB2PERIPH_BASE + 0x2400) ///< Base Address: … macro 212 #define ADC1 ((ADC_TypeDef*) ADC1_BASE)
/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/
A D	HAL_adc.c	152 case ADC1_BASE: in ADC_DeInit()
/bsp/synwit/libraries/SWM320_CSL/CMSIS/DeviceSupport/
A D	SWM320.h	3064 #define ADC1_BASE (APB_BASE + 0x0D000) macro 3116 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A D	ft32f030x6.h	677 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) /* KVL: TBC*/ macro 737 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A D	ft32f030x8.h	715 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) /* KVL: TBC*/ macro 776 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)

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Last Index update Fri Aug 22 02:45:11 CST 2025