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Searched refs:ADCHS (Results 1 – 12 of 12) sorted by relevance

/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/
A DHAL_adc.c399 case ADC_Channel_0: ADCx->ADCHS |= CHEN0_ENABLE; in ADC_RegularChannelConfig()
402 case ADC_Channel_1: ADCx->ADCHS |= CHEN1_ENABLE; in ADC_RegularChannelConfig()
405 case ADC_Channel_2: ADCx->ADCHS |= CHEN2_ENABLE; in ADC_RegularChannelConfig()
408 case ADC_Channel_3: ADCx->ADCHS |= CHEN3_ENABLE; in ADC_RegularChannelConfig()
411 case ADC_Channel_4: ADCx->ADCHS |= CHEN4_ENABLE; in ADC_RegularChannelConfig()
414 case ADC_Channel_5: ADCx->ADCHS |= CHEN5_ENABLE; in ADC_RegularChannelConfig()
434 ADCx->ADCHS &= CHEN_DISABLE; in ADC_RegularChannelConfig()
662 ADC1->ADCHS |= ADCHS_TSVREFE_Set ; in ADC_TempSensorCmd()
670 ADC1->ADCHS &= ADCHS_TSVREFE_Reset; in ADC_TempSensorCmd()
691 ADC1->ADCHS |= ADCHS_VSVREFE_Set ; in ADC_VrefintCmd()
[all …]
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/src/
A DHAL_adc.c399 case ADC_Channel_0: ADCx->ADCHS |= CHEN0_ENABLE; in ADC_RegularChannelConfig()
402 case ADC_Channel_1: ADCx->ADCHS |= CHEN1_ENABLE; in ADC_RegularChannelConfig()
405 case ADC_Channel_2: ADCx->ADCHS |= CHEN2_ENABLE; in ADC_RegularChannelConfig()
408 case ADC_Channel_3: ADCx->ADCHS |= CHEN3_ENABLE; in ADC_RegularChannelConfig()
411 case ADC_Channel_4: ADCx->ADCHS |= CHEN4_ENABLE; in ADC_RegularChannelConfig()
414 case ADC_Channel_5: ADCx->ADCHS |= CHEN5_ENABLE; in ADC_RegularChannelConfig()
417 case ADC_Channel_6: ADCx->ADCHS |= CHEN6_ENABLE; in ADC_RegularChannelConfig()
420 case ADC_Channel_7: ADCx->ADCHS |= CHEN7_ENABLE; in ADC_RegularChannelConfig()
423 case ADC_Channel_8: ADCx->ADCHS |= CHEN8_ENABLE; //SENSOREN or VREFINT in ADC_RegularChannelConfig()
425 case ADC_Channel_All:ADCx->ADCHS |= CHALL_ENABLE; //SENSOREN or VREFINT in ADC_RegularChannelConfig()
[all …]
/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/src/
A DHAL_adc.c399 case ADC_Channel_0: ADCx->ADCHS |= CHEN0_ENABLE; in ADC_RegularChannelConfig()
402 case ADC_Channel_1: ADCx->ADCHS |= CHEN1_ENABLE; in ADC_RegularChannelConfig()
405 case ADC_Channel_2: ADCx->ADCHS |= CHEN2_ENABLE; in ADC_RegularChannelConfig()
408 case ADC_Channel_3: ADCx->ADCHS |= CHEN3_ENABLE; in ADC_RegularChannelConfig()
411 case ADC_Channel_4: ADCx->ADCHS |= CHEN4_ENABLE; in ADC_RegularChannelConfig()
414 case ADC_Channel_5: ADCx->ADCHS |= CHEN5_ENABLE; in ADC_RegularChannelConfig()
417 case ADC_Channel_6: ADCx->ADCHS |= CHEN6_ENABLE; in ADC_RegularChannelConfig()
420 case ADC_Channel_7: ADCx->ADCHS |= CHEN7_ENABLE; in ADC_RegularChannelConfig()
423 case ADC_Channel_8: ADCx->ADCHS |= CHEN8_ENABLE; //SENSOREN or VREFINT in ADC_RegularChannelConfig()
425 case ADC_Channel_All: ADCx->ADCHS |= CHALL_ENABLE; //SENSOREN or VREFINT in ADC_RegularChannelConfig()
[all …]
/bsp/mm32f526x/drivers/
A Ddrv_adc.c44 ADCn->ADCHS &= ~(1 << channel); in ADCxChannelEnable()
45 ADCn->ADCHS |= (1 << channel); in ADCxChannelEnable()
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/
A Dhal_adc.c176 adc->ADCHS &= ~(1 << channel); in ADC_RegularChannelConfig()
177 adc->ADCHS |= (1 << channel); in ADC_RegularChannelConfig()
/bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/
A Dhal_adc.c238 ADCx->ADCHS = conf->SeqSlots; in ADC_EnableRegSeq()
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_adc.h74 __IO u32 ADCHS; member
192 …__IO u32 ADCHS; ///< ADC channel selec… member
/bsp/tkm32F499/Libraries/CMSIS_and_startup/
A Dtk499.h270 __IO uint32_t ADCHS; member
1172 __IO uint32_t ADCHS; /*!< ADC sample time register 1, Address offset: 0x0C */ member
/bsp/mm32l3xx/Libraries/MM32L3xx/Include/
A DMM32L3xx.h234 __IO uint32_t ADCHS; member
/bsp/mm32f103x/Libraries/MM32F103/Include/
A DMM32F103.h243 __IO uint32_t ADCHS; member
/bsp/mm32l07x/Libraries/MM32L0xx/Include/
A DMM32L0xx.h206 __IO uint32_t ADCHS; member
/bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Device/MM32/MM32F3277/Include/
A Dmm32f3277g.h8536 …__IO uint32_t ADCHS; ///< A/D channel sel… member

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