Searched refs:ADC_O_IM (Results 1 – 12 of 12) sorted by relevance
245 HWREG(ui32Base + ADC_O_IM) &= ~(1 << ui32SequenceNum); in ADCIntDisable()279 HWREG(ui32Base + ADC_O_IM) |= 1 << ui32SequenceNum; in ADCIntEnable()1401 HWREG(ui32Base + ADC_O_IM) &= ~(0x10000 << ui32SequenceNum); in ADCComparatorIntDisable()1428 HWREG(ui32Base + ADC_O_IM) |= 0x10000 << ui32SequenceNum; in ADCComparatorIntEnable()1527 HWREG(ui32Base + ADC_O_IM) &= ~ui32IntFlags; in ADCIntDisableEx()1574 HWREG(ui32Base + ADC_O_IM) |= ui32IntFlags; in ADCIntEnableEx()
245 HWREG(ui32Base + ADC_O_IM) &= ~(1 << ui32SequenceNum); in ADCIntDisable()279 HWREG(ui32Base + ADC_O_IM) |= 1 << ui32SequenceNum; in ADCIntEnable()1406 HWREG(ui32Base + ADC_O_IM) &= ~(0x10000 << ui32SequenceNum); in ADCComparatorIntDisable()1433 HWREG(ui32Base + ADC_O_IM) |= 0x10000 << ui32SequenceNum; in ADCComparatorIntEnable()1532 HWREG(ui32Base + ADC_O_IM) &= ~ui32IntFlags; in ADCIntDisableEx()1579 HWREG(ui32Base + ADC_O_IM) |= ui32IntFlags; in ADCIntEnableEx()
229 HWREG(ui32Base + ADC_O_IM) &= ~(1 << ui32SequenceNum); in ADCIntDisable()263 HWREG(ui32Base + ADC_O_IM) |= 1 << ui32SequenceNum; in ADCIntEnable()1349 HWREG(ui32Base + ADC_O_IM) &= ~(0x10000 << ui32SequenceNum); in ADCComparatorIntDisable()1376 HWREG(ui32Base + ADC_O_IM) |= 0x10000 << ui32SequenceNum; in ADCComparatorIntEnable()1475 HWREG(ui32Base + ADC_O_IM) &= ~ui32IntFlags; in ADCIntDisableEx()1522 HWREG(ui32Base + ADC_O_IM) |= ui32IntFlags; in ADCIntEnableEx()
184 HWREG(ulBase + ADC_O_IM) &= ~(1 << ulSequenceNum); in ADCIntDisable()218 HWREG(ulBase + ADC_O_IM) |= 1 << ulSequenceNum; in ADCIntEnable()1252 HWREG(ulBase + ADC_O_IM) &= ~(0x10000 << ulSequenceNum); in ADCComparatorIntDisable()1279 HWREG(ulBase + ADC_O_IM) |= 0x10000 << ulSequenceNum; in ADCComparatorIntEnable()
48 #define ADC_O_IM 0x00000008 // ADC Interrupt Mask macro
50 #define ADC_O_IM 0x00000008 // ADC Interrupt Mask macro
35 #define ADC_O_IM 0x00000008 // ADC Interrupt Mask macro
Completed in 54 milliseconds