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Searched refs:ADC_SMPR1_SAMCTL5_Pos (Results 1 – 1 of 1) sorted by relevance

/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_adc.h653 #define ADC_SMPR1_SAMCTL5_2_5 (0x00U << ADC_SMPR1_SAMCTL5_Pos) ///< 2.5 cycle
654 #define ADC_SMPR1_SAMCTL5_8_5 (0x01U << ADC_SMPR1_SAMCTL5_Pos) ///< 8.5 cycle
655 #define ADC_SMPR1_SAMCTL5_14_5 (0x02U << ADC_SMPR1_SAMCTL5_Pos) ///< 14.5 cycle
656 #define ADC_SMPR1_SAMCTL5_29_5 (0x03U << ADC_SMPR1_SAMCTL5_Pos) ///< 29.5 cycle
657 #define ADC_SMPR1_SAMCTL5_42_5 (0x04U << ADC_SMPR1_SAMCTL5_Pos) ///< 42.5 cycle
658 #define ADC_SMPR1_SAMCTL5_56_5 (0x05U << ADC_SMPR1_SAMCTL5_Pos) ///< 56.5 cycle
659 #define ADC_SMPR1_SAMCTL5_72_5 (0x06U << ADC_SMPR1_SAMCTL5_Pos) ///< 72.5 cycle
660 #define ADC_SMPR1_SAMCTL5_240_5 (0x07U << ADC_SMPR1_SAMCTL5_Pos) ///< 240.5 cycle
661 #define ADC_SMPR1_SAMCTL5_3_5 (0x08U << ADC_SMPR1_SAMCTL5_Pos) ///< 3.5 cycle
662 #define ADC_SMPR1_SAMCTL5_4_5 (0x09U << ADC_SMPR1_SAMCTL5_Pos) ///< 4.5 cycle
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