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Searched refs:AHB1PERIPH_BASE (Results 1 – 3 of 3) sorted by relevance

/bsp/acm32/acm32f0x0-nucleo/libraries/Device/
A DACM32F0x0.h606 #define AHB1PERIPH_BASE (PERIPH_BASE + 0x20000UL) macro
661 #define SPI1_BASE (AHB1PERIPH_BASE)
662 #define SPI2_BASE (AHB1PERIPH_BASE + 0x00000400UL)
663 #define DMAC_BASE (AHB1PERIPH_BASE + 0x00001000UL)
664 #define DMA_Channel0_BASE (AHB1PERIPH_BASE + 0x00001100UL)
665 #define DMA_Channel1_BASE (AHB1PERIPH_BASE + 0x00001120UL)
666 #define DMA_Channel2_BASE (AHB1PERIPH_BASE + 0x00001140UL)
667 #define DMA_Channel3_BASE (AHB1PERIPH_BASE + 0x00001160UL)
668 #define DMA_Channel4_BASE (AHB1PERIPH_BASE + 0x00001180UL)
/bsp/tkm32F499/Libraries/CMSIS_and_startup/
A Dtk499.h1216 #define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000) macro
1222 #define GPIOB_BASE (AHB1PERIPH_BASE + 0x0400)
1223 #define GPIOC_BASE (AHB1PERIPH_BASE + 0x0800)
1224 #define GPIOD_BASE (AHB1PERIPH_BASE + 0x0C00)
1225 #define GPIOE_BASE (AHB1PERIPH_BASE + 0x1000)
1227 #define CRC_BASE (AHB1PERIPH_BASE + 0x3000)
1228 #define RCC_BASE (AHB1PERIPH_BASE + 0x3800)
1229 #define BKP_BASE (AHB1PERIPH_BASE + 0x4000)
1230 #define DMA1_BASE (AHB1PERIPH_BASE + 0x6000)
1231 #define DMA1_Channel1_BASE (AHB1PERIPH_BASE + 0x6008)
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/bsp/apm32/libraries/APM32F4xx_Library/Device/Geehy/APM32F4xx/Include/
A Dapm32f4xx.h7193 #define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000) macro
7253 #define GPIOA_BASE (AHB1PERIPH_BASE + 0x0000)
7254 #define GPIOB_BASE (AHB1PERIPH_BASE + 0x0400)
7255 #define GPIOC_BASE (AHB1PERIPH_BASE + 0x0800)
7256 #define GPIOD_BASE (AHB1PERIPH_BASE + 0x0C00)
7257 #define GPIOE_BASE (AHB1PERIPH_BASE + 0x1000)
7258 #define GPIOF_BASE (AHB1PERIPH_BASE + 0x1400)
7259 #define GPIOG_BASE (AHB1PERIPH_BASE + 0x1800)
7260 #define GPIOH_BASE (AHB1PERIPH_BASE + 0x1C00)
7261 #define GPIOI_BASE (AHB1PERIPH_BASE + 0x2000)
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