1 /**
2   *********************************************************************************
3   *
4   * @file    ald_crc.h
5   * @brief   Header file of CRC module driver.
6   *
7   * @version V1.0
8   * @date    06 Mar. 2023
9   * @author  AE Team
10   * @note
11   *          Change Logs:
12   *          Date            Author          Notes
13   *          06 Mar. 2023    Lisq            The first version
14   *
15   * Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
16   *
17   * SPDX-License-Identifier: Apache-2.0
18   *
19   * Licensed under the Apache License, Version 2.0 (the License); you may
20   * not use this file except in compliance with the License.
21   * You may obtain a copy of the License at
22   *
23   * www.apache.org/licenses/LICENSE-2.0
24   *
25   * Unless required by applicable law or agreed to in writing, software
26   * distributed under the License is distributed on an AS IS BASIS, WITHOUT
27   * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
28   * See the License for the specific language governing permissions and
29   * limitations under the License.
30   **********************************************************************************
31   */
32 
33 #ifndef __ALD_CRC_H__
34 #define __ALD_CRC_H__
35 
36 #ifdef __cplusplus
37  extern "C" {
38 #endif /* __cplusplus */
39 
40 #include "ald_utils.h"
41 #include "ald_dma.h"
42 
43 /** @addtogroup ES32VF2264_ALD
44   * @{
45   */
46 
47 /** @addtogroup CRC
48   * @{
49   */
50 
51 /** @defgroup CRC_Public_Types CRC Public Types
52   * @{
53   */
54 
55 /**
56   * @brief CRC mode
57   */
58 typedef enum {
59     ALD_CRC_MODE_CCITT = 0U,    /**< CCITT */
60     ALD_CRC_MODE_8     = 1U,    /**< CRC8 */
61     ALD_CRC_MODE_16    = 2U,    /**< CRC16 */
62     ALD_CRC_MODE_32    = 3U,    /**< CRC32 */
63 } ald_crc_mode_t;
64 
65 /**
66   * @brief CRC input length
67   */
68 typedef enum {
69     ALD_CRC_LEN_AUTO    = 0U,   /**< Auto */
70     ALD_CRC_DATASIZE_8  = 1U,   /**< Byte */
71     ALD_CRC_DATASIZE_16 = 2U,   /**< Half word */
72     ALD_CRC_DATASIZE_32 = 3U,   /**< Word */
73 } ald_crc_datasize_t;
74 
75 /**
76   * @brief CRC whether write error or no
77   */
78 typedef enum {
79     ALD_CRC_WERR_NO  = 0U,  /**< No error */
80     ALD_CRC_WERR_ERR = 1U,  /**< Error */
81 } ald_crc_werr_t;
82 
83 /**
84   * @brief CRC state structures definition
85   */
86 typedef enum {
87     ALD_CRC_STATE_RESET = 0x0U, /**< Peripheral is not initialized */
88     ALD_CRC_STATE_READY = 0x1U, /**< Peripheral Initialized and ready for use */
89     ALD_CRC_STATE_BUSY  = 0x2U, /**< An internal process is ongoing */
90     ALD_CRC_STATE_ERROR = 0x4U, /**< Error */
91 } ald_crc_state_t;
92 
93 /**
94   * @brief CRC init structure definition
95   */
96 typedef struct {
97     ald_crc_mode_t mode;    /**< CRC mode */
98     type_func_t data_rev;   /**< CRC data reverse or no */
99     type_func_t data_inv;   /**< CRC data inverse or no */
100     type_func_t chs_rev;    /**< CRC check sum reverse or no */
101     type_func_t chs_inv;    /**< CRC check sum inverse or no */
102     uint32_t seed;      /**< CRC seed */
103 } ald_crc_init_t;
104 
105 /**
106   * @brief  CRC Handle Structure definition
107   */
108 typedef struct ald_crc_handle_s {
109     CRC_TypeDef *perh;  /**< Register base address */
110     ald_crc_init_t init;    /**< CRC required parameters */
111     uint8_t *cal_buf;   /**< The pointer of preparing buffer */
112     uint32_t *cal_res;  /**< The pointer of result */
113 
114     ald_dma_handle_t hdma;  /**< CRC DMA handle parameters */
115 
116     lock_state_t lock;  /**< Locking object */
117     ald_crc_state_t state;  /**< CRC operation state */
118 
119     void (*cal_cplt_cbk)(struct ald_crc_handle_s *arg); /**< Calculate completed callback */
120     void (*err_cplt_cbk)(struct ald_crc_handle_s *arg); /**< Calculate error callback */
121 } ald_crc_handle_t;
122 /**
123   * @}
124   */
125 
126 /** @defgroup CRC_Public_Macros CRC Public Macros
127   * @{
128   */
129 #define ALD_CRC_ENABLE(handle)      (SET_BIT((handle)->perh->CR, CRC_CR_EN_MSK))
130 #define ALD_CRC_DISABLE(handle)     (CLEAR_BIT((handle)->perh->CR, CRC_CR_EN_MSK))
131 #define ALD_CRC_RESET(handle)       (SET_BIT((handle)->perh->CR, CRC_CR_RST_MSK))
132 #define ALD_CRC_DMA_ENABLE(handle)      (SET_BIT((handle)->perh->CR, CRC_CR_DMAEN_MSK))
133 #define ALD_CRC_DMA_DISABLE(handle)     (CLEAR_BIT((handle)->perh->CR, CRC_CR_DMAEN_MSK))
134 #define ALD_CRC_CLEAR_ERROR_FLAG(handle)    (SET_BIT((handle)->perh->CR, CRC_CR_WERR_MSK))
135 /**
136   * @}
137   */
138 
139 /** @defgroup CRC_Private_Macros   CRC Private Macros
140   * @{
141   */
142 #define IS_CRC(x)   ((x) == CRC)
143 #define IS_CRC_MODE(x)  (((x) == ALD_CRC_MODE_CCITT) || \
144              ((x) == ALD_CRC_MODE_8)     || \
145              ((x) == ALD_CRC_MODE_16)    || \
146              ((x) == ALD_CRC_MODE_32))
147 /**
148   * @}
149   */
150 
151 /** @addtogroup CRC_Public_Functions
152   * @{
153   */
154 
155 /** @addtogroup CRC_Public_Functions_Group1
156   * @{
157   */
158 ald_status_t ald_crc_init(ald_crc_handle_t *hperh);
159 void ald_crc_reset(ald_crc_handle_t *hperh);
160 /**
161   * @}
162   */
163 
164 /** @addtogroup CRC_Public_Functions_Group2
165   * @{
166   */
167 uint32_t ald_crc_calculate(ald_crc_handle_t *hperh, uint8_t *buf, uint32_t size);
168 uint32_t ald_crc_calculate_halfword(ald_crc_handle_t *hperh, uint16_t *buf, uint32_t size);
169 uint32_t ald_crc_calculate_word(ald_crc_handle_t *hperh, uint32_t *buf, uint32_t size);
170 /**
171   * @}
172   */
173 
174 
175 /** @addtogroup CRC_Public_Functions_Group3
176   * @{
177   */
178 ald_status_t ald_crc_calculate_by_dma(ald_crc_handle_t *hperh, uint8_t *buf, uint32_t *res, uint16_t size, uint8_t channel);
179 ald_status_t ald_crc_calculate_halfword_by_dma(ald_crc_handle_t *hperh, uint16_t *buf, uint32_t *res, uint16_t size, uint8_t channel);
180 ald_status_t ald_crc_calculate_word_by_dma(ald_crc_handle_t *hperh, uint32_t *buf, uint32_t *res, uint16_t size, uint8_t channel);
181 ald_status_t ald_crc_dma_pause(ald_crc_handle_t *hperh);
182 ald_status_t ald_crc_dma_resume(ald_crc_handle_t *hperh);
183 ald_status_t ald_crc_dma_stop(ald_crc_handle_t *hperh);
184 /**
185   * @}
186   */
187 
188 /** @addtogroup CRC_Public_Functions_Group4
189   * @{
190   */
191 ald_crc_state_t ald_crc_get_state(ald_crc_handle_t *hperh);
192 /**
193   * @}
194   */
195 
196 /**
197   * @}
198   */
199 
200 /**
201   * @}
202   */
203 
204 /**
205   * @}
206   */
207 
208 #ifdef __cplusplus
209 }
210 #endif /* __cplusplus */
211 
212 #endif /* __ALD_CRC_H__ */
213