Searched refs:AM_REGVAL (Results 1 – 11 of 11) sorted by relevance
87 AM_REGVAL(AM_REG_ITM_LOCKAREG_O) = AM_REG_ITM_LOCKAREG_KEYVAL; in am_hal_itm_enable()93 AM_REGVAL(AM_REG_ITM_TPR_O) = 0x0000000f; in am_hal_itm_enable()94 AM_REGVAL(AM_REG_ITM_TER_O) = 0xffffffff; in am_hal_itm_enable()99 AM_REGVAL(AM_REG_ITM_TCR_O) = in am_hal_itm_enable()133 AM_REGVAL(AM_REG_ITM_LOCKAREG_O) = AM_REG_ITM_LOCKAREG_KEYVAL; in am_hal_itm_disable()207 AM_REGVAL(AM_REG_ITM_TPR_O) |= (0x00000001 << (ui8portNum>>3)); in am_hal_itm_trace_port_enable()251 while (!AM_REGVAL(ui32StimAddr)); in am_hal_itm_stimulus_not_busy()278 while (!AM_REGVAL(ui32StimAddr)); in am_hal_itm_stimulus_reg_word_write()283 AM_REGVAL(ui32StimAddr) = ui32Value; in am_hal_itm_stimulus_reg_word_write()308 while (!AM_REGVAL(ui32StimAddr)); in am_hal_itm_stimulus_reg_short_write()[all …]
263 (AM_REGVAL(AM_HAL_GPIO_PADREG(n)) & ~AM_HAL_GPIO_PADREG_M(n)))291 (AM_REGVAL(AM_HAL_GPIO_ALTPADREG(n)) & ~AM_HAL_GPIO_ALTPADREG_M(n)))317 (AM_REGVAL(AM_HAL_GPIO_CFG(n)) & ~AM_HAL_GPIO_CFG_M(n)))340 (AM_REGVAL(AM_HAL_GPIO_CFG(n)) & ~AM_HAL_GPIO_POL_M(n)))357 AM_REGVAL(AM_HAL_GPIO_RD_REG(n))374 AM_REGVAL(AM_HAL_GPIO_WT_REG(n))391 AM_REGVAL(AM_HAL_GPIO_WTS_REG(n))408 AM_REGVAL(AM_HAL_GPIO_WTC_REG(n))425 AM_REGVAL(AM_HAL_GPIO_EN_REG(n))442 AM_REGVAL(AM_HAL_GPIO_ENS_REG(n))[all …]
458 if ( ( AM_REGVAL(ui32Address) & ui32Mask ) == ui32Value ) in am_hal_flash_delay_status_change()665 return AM_REGVAL(AM_HAL_FLASH_INFO_SECURITY_ADDR) & in am_hal_flash_info_erase_disable_check()770 return ((AM_REGVAL(AM_HAL_FLASH_INFO_SECURITY_ADDR) & in am_hal_flash_info_program_disable_get()809 ui32SecurityValue = AM_REGVAL(AM_HAL_FLASH_INFO_SECURITY_ADDR) & in am_hal_flash_wipe_flash_enable()854 return AM_REGVAL(AM_HAL_FLASH_INFO_SECURITY_ADDR) & in am_hal_flash_wipe_flash_enable_check()890 ui32SecurityValue = AM_REGVAL(AM_HAL_FLASH_INFO_SECURITY_ADDR) & in am_hal_flash_wipe_sram_enable()935 return AM_REGVAL(AM_HAL_FLASH_INFO_SECURITY_ADDR) & in am_hal_flash_wipe_sram_enable_check()971 ui32SecurityValue = AM_REGVAL(AM_HAL_FLASH_INFO_SECURITY_ADDR) & in am_hal_flash_swo_disable()1016 return AM_REGVAL(AM_HAL_FLASH_INFO_SECURITY_ADDR) & in am_hal_flash_swo_disable_check()1052 ui32SecurityValue = AM_REGVAL(AM_HAL_FLASH_INFO_SECURITY_ADDR) & in am_hal_flash_debugger_disable()[all …]
89 … AM_REGVAL(am_hal_i2c_bit_bang_priv.sck_reg_clr_addr) = (am_hal_i2c_bit_bang_priv.sck_reg_val); \94 … AM_REGVAL(am_hal_i2c_bit_bang_priv.sck_reg_set_addr) = (am_hal_i2c_bit_bang_priv.sck_reg_val); \97 #define GET_SCL() (AM_REGVAL(am_hal_i2c_bit_bang_priv.sck_reg_read_addr) & (am_hal_i2c_bit_bang_p…98 #define GET_SDA() (AM_REGVAL(am_hal_i2c_bit_bang_priv.sda_reg_read_addr) & (am_hal_i2c_bit_bang_p…102 … AM_REGVAL(am_hal_i2c_bit_bang_priv.sda_reg_clr_addr) = (am_hal_i2c_bit_bang_priv.sda_reg_val); \107 … AM_REGVAL(am_hal_i2c_bit_bang_priv.sda_reg_set_addr) = (am_hal_i2c_bit_bang_priv.sda_reg_val); \
474 AM_REGVAL(pui32ConfigReg) = ui32ConfigVal; in am_hal_ctimer_config()574 ui32WriteVal = AM_REGVAL(pui32ConfigReg); in am_hal_ctimer_config_single()603 AM_REGVAL(pui32ConfigReg) = ui32WriteVal; in am_hal_ctimer_config_single()682 AM_REGVAL(pui32ConfigReg) = ui32ConfigVal; in am_hal_ctimer_start()737 AM_REGVAL(pui32ConfigReg) &= ~(ui32TimerSegment & in am_hal_ctimer_stop()791 AM_REGVAL(pui32ConfigReg) |= (ui32TimerSegment & in am_hal_ctimer_clear()959 AM_REGVAL(pui32ConfigReg) |= (ui32TimerSegment & in am_hal_ctimer_pin_enable()1009 AM_REGVAL(pui32ConfigReg) &= ~(ui32TimerSegment & in am_hal_ctimer_pin_disable()1069 AM_REGVAL(pui32ConfigReg) |= (ui32TimerSegment & in am_hal_ctimer_pin_invert()1078 AM_REGVAL(pui32ConfigReg) &= ~(ui32TimerSegment & in am_hal_ctimer_pin_invert()
173 AM_REGVAL(AM_REG_STIMER_COMPARE(0, ui32CmprInstance)) = ui32Delta; in am_hal_stimer_compare_delta_set()202 return AM_REGVAL(AM_REG_STIMER_COMPARE(0, ui32CmprInstance)); in am_hal_stimer_compare_get()307 return AM_REGVAL(AM_REG_STIMER_CAPTURE(0, ui32CaptureNum)); in am_hal_stimer_capture_get()
251 AM_REGVAL(ui32RegOffset) = ui32SlotConfig; in am_hal_adc_slot_config()
494 return (AM_REGVAL(AM_HAL_GPIO_CFG(ui32BitNum)) & in am_hal_gpio_int_polarity_bit_get()
819 hwFifoPtrReg = AM_REGVAL(hwFifoPtrRegAddr); in internal_resync_fifoSize()830 hwFifoPtrReg = AM_REGVAL(hwFifoPtrRegAddr); in internal_resync_fifoSize()
335 ui8PadRegVal = ((AM_REGVAL(AM_HAL_GPIO_PADREG(g_IOMPads[index].pad))) & in iom_calc_gpio()439 ui8PadRegVal = ((AM_REGVAL(AM_HAL_GPIO_PADREG(g_I2CPads[index].pad))) & in internal_iom_wait_i2c_scl_hi()
102 #define AM_REGVAL(x) (*((volatile uint32_t *)(x))) macro162 AM_REGVAL(AM_REG_##module##n(instance) + AM_REG_##module##_##reg##_O)
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