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Searched refs:AM_REGn (Results 1 – 11 of 11) sorted by relevance

/bsp/apollo2/libraries/drivers/hal/
A Dam_hal_uart.c148 AM_REGn(UART, ui32Module, LCRH) |= ui32ConfigVal; in am_hal_uart_config()
176 return AM_REGn(UART, ui32Module, RSR); in am_hal_uart_status_get()
214 return AM_REGn(UART, ui32Module, MIS); in am_hal_uart_int_status_get()
221 return AM_REGn(UART, ui32Module, IES); in am_hal_uart_int_status_get()
257 AM_REGn(UART, ui32Module, IEC) = ui32Interrupt; in am_hal_uart_int_clear()
360 return AM_REGn(UART, ui32Module, IER); in am_hal_uart_int_enable_get()
645 AM_REGn(UART, ui32Module, IFLS) = ui32LvlCfg; in am_hal_uart_fifo_config()
663 return AM_REGn(UART, ui32Module, FR); in am_hal_uart_flags_get()
688 AM_REGn(UART, ui32Module, DR) = cChar; in am_hal_uart_char_transmit_polled()
741 *pcChar = AM_REGn(UART, ui32Module, DR); in am_hal_uart_char_receive_polled()
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A Dam_hal_gpio.c111 ui64RetVal = ((uint64_t) AM_REGn(GPIO, 0, RDB)) << 32; in am_hal_gpio_input_read()
112 ui64RetVal |= ((uint64_t) AM_REGn(GPIO, 0, RDA)) << 0; in am_hal_gpio_input_read()
135 ui64RetVal = ((uint64_t) AM_REGn(GPIO, 0, WTB)) << 32; in am_hal_gpio_out_read()
136 ui64RetVal |= ((uint64_t) AM_REGn(GPIO, 0, WTA)) << 0; in am_hal_gpio_out_read()
181 ui64RetVal = ((uint64_t) AM_REGn(GPIO, 0, ENB)) << 32; in am_hal_gpio_out_enable_get()
182 ui64RetVal |= ((uint64_t) AM_REGn(GPIO, 0, ENA)) << 0; in am_hal_gpio_out_enable_get()
226 ui64RetVal = ((uint64_t) AM_REGn(GPIO, 0, INT1EN)) << 32; in am_hal_gpio_int_enable_get()
227 ui64RetVal |= ((uint64_t) AM_REGn(GPIO, 0, INT0EN)) << 0; in am_hal_gpio_int_enable_get()
327 ui64RetVal = ((uint64_t) AM_REGn(GPIO, 0, INT1STAT)) << 32; in am_hal_gpio_int_status_get()
328 ui64RetVal |= ((uint64_t) AM_REGn(GPIO, 0, INT0STAT)) << 0; in am_hal_gpio_int_status_get()
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A Dam_hal_iom.c492 AM_REGn(GPIO, 0, PADKEY) = 0; in internal_iom_wait_i2c_scl_hi()
1000 AM_REGn(IOMSTR, ui32Module, FIFOTHR) = in am_hal_iom_config()
1004 AM_REGn(IOMSTR, ui32Module, FIFOTHR) = in am_hal_iom_config()
1353 AM_REGn(GPIO, 0, PADKEY) = 0; in am_hal_iom_workaround_word_write()
1847 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_spi_write_nq()
2032 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_spi_read_nq()
2235 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_spi_fullduplex_nq()
2602 AM_REGn(IOMSTR, 4, INTEN) = 0; in am_hal_iom_spi_read_nb()
2830 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_i2c_write_nq()
3027 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_i2c_read_nq()
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A Dam_hal_wdt.c119 AM_REGn(WDT, 0, INTEN) |= AM_REG_WDT_INTEN_WDT_M; in am_hal_wdt_init()
127 AM_REGn(WDT, 0, INTEN) &= ~AM_REG_WDT_INTEN_WDT_M; in am_hal_wdt_init()
161 AM_REGn(WDT, 0, CFG) = ui32ConfigVal; in am_hal_wdt_init()
182 AM_REGn(WDT, 0, CFG) |= AM_REG_WDT_CFG_WDTEN_M; in am_hal_wdt_start()
183 AM_REGn(WDT, 0, RSTRT) |= AM_REG_WDT_RSTRT_RSTRT_KEYVALUE; in am_hal_wdt_start()
204 AM_REGn(WDT, 0, CFG) &= ~AM_REG_WDT_CFG_WDTEN_M; in am_hal_wdt_halt()
224 AM_REGn(WDT, 0, LOCK) = AM_REG_WDT_LOCK_LOCK_KEYVALUE; in am_hal_wdt_lock_and_start()
280 AM_REGn(WDT, 0, INTCLR) = AM_REG_WDT_INTCLR_WDT_M; in am_hal_wdt_int_clear()
A Dam_hal_stimer.c350 AM_REGn(CTIMER, 0, STMINTEN) |= ui32Interrupt; in am_hal_stimer_int_enable()
387 return AM_REGn(CTIMER, 0, STMINTEN); in am_hal_stimer_int_enable_get()
427 AM_REGn(CTIMER, 0, STMINTEN) &= ~ui32Interrupt; in am_hal_stimer_int_disable()
467 AM_REGn(CTIMER, 0, STMINTSET) = ui32Interrupt; in am_hal_stimer_int_set()
507 AM_REGn(CTIMER, 0, STMINTCLR) = ui32Interrupt; in am_hal_stimer_int_clear()
533 uint32_t ui32RetVal = AM_REGn(CTIMER, 0, STMINTSTAT); in am_hal_stimer_int_status_get()
537 ui32RetVal &= AM_REGn(CTIMER, 0, STMINTEN); in am_hal_stimer_int_status_get()
A Dam_hal_ctimer.c1358 AM_REGn(CTIMER, 0, CTRL3) |= AM_REG_CTIMER_CTRL3_ADCEN_M; in am_hal_ctimer_adc_trigger_enable()
1386 AM_REGn(CTIMER, 0, CTRL3) &= ~AM_REG_CTIMER_CTRL3_ADCEN_M; in am_hal_ctimer_adc_trigger_disable()
1440 AM_REGn(CTIMER, 0, INTEN) |= ui32Interrupt; in am_hal_ctimer_int_enable()
1483 return AM_REGn(CTIMER, 0, INTEN); in am_hal_ctimer_int_enable_get()
1529 AM_REGn(CTIMER, 0, INTEN) &= ~ui32Interrupt; in am_hal_ctimer_int_disable()
1575 AM_REGn(CTIMER, 0, INTCLR) = ui32Interrupt; in am_hal_ctimer_int_clear()
1616 AM_REGn(CTIMER, 0, INTSET) = ui32Interrupt; in am_hal_ctimer_int_set()
1667 u32RetVal = AM_REGn(CTIMER, 0, INTSTAT); in am_hal_ctimer_int_status_get()
1668 u32RetVal &= AM_REGn(CTIMER, 0, INTEN); in am_hal_ctimer_int_status_get()
1679 return AM_REGn(CTIMER, 0, INTSTAT); in am_hal_ctimer_int_status_get()
A Dam_hal_wdt.h149 AM_REGn(WDT, 0, RSTRT) = AM_REG_WDT_RSTRT_RSTRT_KEYVALUE; \
150 (void)AM_REGn(WDT, 0, RSTRT); \
A Dam_hal_gpio.h483 AM_REGn(GPIO, 0, PADKEY) = AM_REG_GPIO_PADKEY_KEYVAL; \
489 AM_REGn(GPIO, 0, PADKEY) = 0; \
515 AM_REGn(GPIO, 0, PADKEY) = AM_REG_GPIO_PADKEY_KEYVAL; \
517 AM_REGn(GPIO, 0, PADKEY) = 0; \
A Dam_hal_tpiu.c316 AM_REGn(MCUCTRL, 0, TPIUCTRL) = in am_hal_tpiu_enable()
A Dam_hal_ios.c167 AM_REGn(IOSLAVE, ui32Module, CFG) |= AM_REG_IOSLAVE_CFG_IFCEN(1); in am_hal_ios_enable()
183 AM_REGn(IOSLAVE, ui32Module, CFG) &= ~(AM_REG_IOSLAVE_CFG_IFCEN(1)); in am_hal_ios_disable()
/bsp/apollo2/libraries/drivers/regs/
A Dam_reg_macros.h122 AM_REGn(module, 0, reg)
161 #define AM_REGn(module, instance, reg) \ macro
165 AM_REGn(module, instance, reg) = \
167 (AM_REGn(module, instance, reg) & \
171 AM_REGn(module, instance, reg) = \
173 (AM_REGn(module, instance, reg) & \
177 AM_BFX(module, reg, field, AM_REGn(module, instance, reg))
180 (AM_REGn(module, instance, reg) & AM_REG_##module##_##reg##_##field##_M)
216 AM_REGn(module, instance, reg) operator##= (value); \
221 AM_REGn(module, instance, reg) |= (mask); \
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