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Searched refs:ANA_REG9_PLLLSEL_6_5M (Results 1 – 5 of 5) sorted by relevance

/bsp/Vango/v85xxp/Libraries/VangoV85xxP_standard_peripheral/Include/
A Dlib_clk.h93 #define ANA_REG9_PLLLSEL_6_5M (0x2U << ANA_REG9_PLLLSEL_Pos) macro
147 #define CLK_PLLL_6_5536MHz ANA_REG9_PLLLSEL_6_5M
/bsp/Vango/v85xxp/Libraries/VangoV85xxP_standard_peripheral/Source/
A Dlib_clk.c486 case ANA_REG9_PLLLSEL_6_5M: in CLK_GetHCLKFreq()
547 case ANA_REG9_PLLLSEL_6_5M: in CLK_GetPLLLFreq()
/bsp/Vango/v85xx/Libraries/VangoV85xx_standard_peripheral/Include/
A Dlib_clk.h118 #define CLK_PLLL_6_5536MHz ANA_REG9_PLLLSEL_6_5M
/bsp/Vango/v85xx/Libraries/VangoV85xx_standard_peripheral/Source/
A Dlib_clk.c501 case ANA_REG9_PLLLSEL_6_5M: in CLK_GetHCLKFreq()
/bsp/Vango/v85xx/Libraries/CMSIS/Vango/V85xx/Include/
A Dtarget.h1049 #define ANA_REG9_PLLLSEL_6_5M (0x2U << ANA_REG9_PLLLSEL_Pos) macro

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