Searched refs:ANA_REG9_PLLLSEL_6_5M (Results 1 – 5 of 5) sorted by relevance
93 #define ANA_REG9_PLLLSEL_6_5M (0x2U << ANA_REG9_PLLLSEL_Pos) macro147 #define CLK_PLLL_6_5536MHz ANA_REG9_PLLLSEL_6_5M
486 case ANA_REG9_PLLLSEL_6_5M: in CLK_GetHCLKFreq()547 case ANA_REG9_PLLLSEL_6_5M: in CLK_GetPLLLFreq()
118 #define CLK_PLLL_6_5536MHz ANA_REG9_PLLLSEL_6_5M
501 case ANA_REG9_PLLLSEL_6_5M: in CLK_GetHCLKFreq()
1049 #define ANA_REG9_PLLLSEL_6_5M (0x2U << ANA_REG9_PLLLSEL_Pos) macro
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