| /bsp/acm32/acm32f0x0-nucleo/libraries/Device/ |
| A D | ACM32F0x0.h | 605 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000UL) macro
626 #define COMP_BASE (APB2PERIPH_BASE + 0x00000200UL)
627 #define OPA_BASE (APB2PERIPH_BASE + 0x00000300UL)
628 #define EXTI_BASE (APB2PERIPH_BASE + 0x00000400UL)
629 #define SCU_BASE (APB2PERIPH_BASE + 0x00000800UL)
630 #define CRC_BASE (APB2PERIPH_BASE + 0x00000C00UL)
631 #define ADC_BASE (APB2PERIPH_BASE + 0x00002400UL)
632 #define TIM1_BASE (APB2PERIPH_BASE + 0x00002C00UL)
633 #define UART1_BASE (APB2PERIPH_BASE + 0x00003800UL)
634 #define TIM15_BASE (APB2PERIPH_BASE + 0x00004000UL)
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| /bsp/acm32/acm32f4xx-nucleo/libraries/Device/ |
| A D | ACM32F4.h | 679 #define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000UL) macro
707 #define COMP_BASE (APB2PERIPH_BASE + 0x00000200UL)
708 #define OPA_BASE (APB2PERIPH_BASE + 0x00000300UL)
709 #define EXTI_BASE (APB2PERIPH_BASE + 0x00000400UL)
710 #define SCU_BASE (APB2PERIPH_BASE + 0x00000800UL)
711 #define CRC_BASE (APB2PERIPH_BASE + 0x00000C00UL)
712 #define ADC_BASE (APB2PERIPH_BASE + 0x00002400UL)
713 #define TIM1_BASE (APB2PERIPH_BASE + 0x00002C00UL)
714 #define I2S1_BASE (APB2PERIPH_BASE + 0x00003000UL)
715 #define UART1_BASE (APB2PERIPH_BASE + 0x00003800UL)
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| /bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/CMSIS/WCH/CH32V10x/Include/ |
| A D | ch32v10x.h | 510 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
537 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
538 #define EXTI_BASE (APB2PERIPH_BASE + 0x0400)
539 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
540 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
541 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
542 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
543 #define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
544 #define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)
545 #define GPIOG_BASE (APB2PERIPH_BASE + 0x2000)
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| /bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/StdPeriph_Driver/inc/ |
| A D | ch32v10x.h | 510 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
537 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
538 #define EXTI_BASE (APB2PERIPH_BASE + 0x0400)
539 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
540 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
541 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
542 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
543 #define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
544 #define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)
545 #define GPIOG_BASE (APB2PERIPH_BASE + 0x2000)
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| /bsp/mm32f327x/Libraries/MM32F327x/Include/ |
| A D | reg_uart.h | 49 #define UART1_BASE (APB2PERIPH_BASE + 0x3800) ///< Base Address: …
54 #define UART6_BASE (APB2PERIPH_BASE + 0x3C00) ///< Base Address: …
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| A D | reg_comp.h | 46 #define COMP_BASE (APB2PERIPH_BASE + 0x4000) ///< Base Address: …
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| A D | reg_flash.h | 44 #define CACHE_BASE (APB2PERIPH_BASE + 0x6000) ///< Base Address: …
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| A D | reg_syscfg.h | 45 #define SYSCFG_BASE (APB2PERIPH_BASE + 0x0000) ///< Base Address: …
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| A D | reg_tim.h | 49 #define TIM1_BASE (APB2PERIPH_BASE + 0x2C00) ///< Base Address: …
57 #define TIM8_BASE (APB2PERIPH_BASE + 0x3400) ///< Base Address: …
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| A D | reg_adc.h | 45 #define ADC1_BASE (APB2PERIPH_BASE + 0x2400) ///< Base Address: …
46 #define ADC2_BASE (APB2PERIPH_BASE + 0x2800) ///< Base Address: …
47 #define ADC3_BASE (APB2PERIPH_BASE + 0x4C00) ///< Base Address: …
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| /bsp/tkm32F499/Libraries/CMSIS_and_startup/ |
| A D | tk499.h | 1213 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
1262 #define TIM2_BASE (APB2PERIPH_BASE + 0x0400)
1263 #define UART1_BASE (APB2PERIPH_BASE + 0x0800)
1264 #define UART2_BASE (APB2PERIPH_BASE + 0x0C00)
1265 #define UART3_BASE (APB2PERIPH_BASE + 0x1000)
1266 #define UART4_BASE (APB2PERIPH_BASE + 0x1400)
1267 #define UART5_BASE (APB2PERIPH_BASE + 0x1800)
1268 #define ADC1_BASE (APB2PERIPH_BASE + 0x2000)
1269 #define SDIO1_BASE (APB2PERIPH_BASE + 0x2C00)
1270 #define SDIO2_BASE (APB2PERIPH_BASE + 0x3000)
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| /bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/CMSIS/WCH/CH32F20x/Include/ |
| A D | ch32f20x.h | 964 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
993 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
994 #define EXTI_BASE (APB2PERIPH_BASE + 0x0400)
995 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
996 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
997 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
998 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
999 #define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
1000 #define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)
1001 #define GPIOG_BASE (APB2PERIPH_BASE + 0x2000)
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| /bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/StdPeriph_Driver/inc/ |
| A D | ch32f20x.h | 964 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
993 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
994 #define EXTI_BASE (APB2PERIPH_BASE + 0x0400)
995 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
996 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
997 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
998 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
999 #define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
1000 #define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)
1001 #define GPIOG_BASE (APB2PERIPH_BASE + 0x2000)
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| /bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/CMSIS/WCH/CH32F10x/Include/ |
| A D | ch32f10x.h | 606 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
635 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
636 #define EXTI_BASE (APB2PERIPH_BASE + 0x0400)
637 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
638 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
639 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
640 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
641 #define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
642 #define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)
643 #define GPIOG_BASE (APB2PERIPH_BASE + 0x2000)
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| /bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/StdPeriph_Driver/inc/ |
| A D | ch32f10x.h | 606 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
635 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
636 #define EXTI_BASE (APB2PERIPH_BASE + 0x0400)
637 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
638 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
639 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
640 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
641 #define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
642 #define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)
643 #define GPIOG_BASE (APB2PERIPH_BASE + 0x2000)
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| /bsp/apm32/libraries/APM32E10x_Library/Device/Geehy/APM32E10x/Include/ |
| A D | apm32e10x.h | 5855 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
5886 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
5887 #define EINT_BASE (APB2PERIPH_BASE + 0x0400)
5888 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
5889 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
5890 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
5891 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
5892 #define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
5893 #define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)
5894 #define GPIOG_BASE (APB2PERIPH_BASE + 0x2000)
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| /bsp/apm32/libraries/APM32F10x_Library/Device/Geehy/APM32F10x/Include/ |
| A D | apm32f10x.h | 6858 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
6889 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
6890 #define EINT_BASE (APB2PERIPH_BASE + 0x0400)
6891 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
6892 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
6893 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
6894 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
6895 #define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
6896 #define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)
6897 #define GPIOG_BASE (APB2PERIPH_BASE + 0x2000)
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| /bsp/mm32l3xx/Libraries/MM32L3xx/Include/ |
| A D | MM32L3xx.h | 942 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
965 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
966 #define EXTI_BASE (APB2PERIPH_BASE + 0x0400)
967 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
968 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
969 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
970 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
974 #define ADC1_BASE (APB2PERIPH_BASE + 0x2400)
975 #define ADC2_BASE (APB2PERIPH_BASE + 0x2800)
976 #define TIM1_BASE (APB2PERIPH_BASE + 0x2C00)
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| /bsp/mm32f103x/Libraries/MM32F103/Include/ |
| A D | MM32F103.h | 951 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
974 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
975 #define EXTI_BASE (APB2PERIPH_BASE + 0x0400)
976 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
977 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
978 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
979 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
983 #define ADC1_BASE (APB2PERIPH_BASE + 0x2400)
984 #define ADC2_BASE (APB2PERIPH_BASE + 0x2800)
985 #define TIM1_BASE (APB2PERIPH_BASE + 0x2C00)
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| /bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/ |
| A D | air32f10x.h | 962 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
991 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
992 #define EXTI_BASE (APB2PERIPH_BASE + 0x0400)
993 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
994 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
995 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
996 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
997 #define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
998 #define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)
999 #define GPIOG_BASE (APB2PERIPH_BASE + 0x2000)
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| /bsp/apm32/libraries/APM32F4xx_Library/Device/Geehy/APM32F4xx/Include/ |
| A D | apm32f4xx.h | 7192 #define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000) macro
7228 #define TMR1_BASE (APB2PERIPH_BASE + 0x0000)
7229 #define TMR8_BASE (APB2PERIPH_BASE + 0x0400)
7230 #define USART1_BASE (APB2PERIPH_BASE + 0x1000)
7231 #define USART6_BASE (APB2PERIPH_BASE + 0x1400)
7234 #define ADC1_BASE (APB2PERIPH_BASE + 0x2000)
7235 #define ADC2_BASE (APB2PERIPH_BASE + 0x2100)
7236 #define ADC3_BASE (APB2PERIPH_BASE + 0x2200)
7237 #define ADC_BASE (APB2PERIPH_BASE + 0x2300)
7238 #define SDIO_BASE (APB2PERIPH_BASE + 0x2C00)
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| /bsp/apm32/libraries/APM32S10x_Library/Device/Geehy/APM32S10x/Include/ |
| A D | apm32s10x.h | 4361 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
4382 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
4383 #define EINT_BASE (APB2PERIPH_BASE + 0x0400)
4384 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
4385 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
4386 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
4387 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
4388 #define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
4389 #define ADC1_BASE (APB2PERIPH_BASE + 0x2400)
4390 #define ADC2_BASE (APB2PERIPH_BASE + 0x2800)
[all …]
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| /bsp/stm32/libraries/HAL_Drivers/drivers/ |
| A D | drv_pwm.c | 172 #elif defined(APB1PERIPH_BASE) || defined(APB2PERIPH_BASE) in tim_clock_get()
173 if ((rt_uint32_t)htim->Instance >= APB2PERIPH_BASE) in tim_clock_get()
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| A D | drv_tim.c | 399 #elif defined(APB1PERIPH_BASE) || defined(APB2PERIPH_BASE) in timer_init()
400 if ((rt_uint32_t)tim->Instance >= APB2PERIPH_BASE) in timer_init()
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| /bsp/mm32l07x/Libraries/MM32L0xx/Include/ |
| A D | MM32L0xx.h | 884 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) macro
906 #define SYSCFG_BASE (APB2PERIPH_BASE + 0x0000)
907 #define EXTI_BASE (APB2PERIPH_BASE + 0x0400)
922 #define ADC1_BASE (APB2PERIPH_BASE + 0x2400)
924 #define TIM1_BASE (APB2PERIPH_BASE + 0x2C00)
925 #define SPI1_BASE (APB2PERIPH_BASE + 0x3000)
926 #define SPI1_BASE (APB2PERIPH_BASE + 0x3000)
928 #define UART1_BASE (APB2PERIPH_BASE + 0x3800)
929 #define TIM14_BASE (APB2PERIPH_BASE + 0x4000)
930 #define TIM16_BASE (APB2PERIPH_BASE + 0x4400)
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