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Searched refs:APB_CLK (Results 1 – 6 of 6) sorted by relevance

/bsp/loongson/ls1bdev/libraries/
A Dls1b_clock.c20 #define APB_CLK (AHB_CLK) macro
44 pll_rate = (12 + (ctrl & 0x3f)) * APB_CLK / 2 in clk_get_pll_rate()
45 + ((ctrl >> 8) & 0x3ff) * APB_CLK / 1024 / 2; in clk_get_pll_rate()
/bsp/loongson/ls1cdev/libraries/
A Dls1c_clock.c18 #define APB_CLK (AHB_CLK) macro
58 pll_rate = (((ctrl & M_PLL) >> M_PLL_SHIFT) + ((ctrl & FRAC_N) >> FRAC_N_SHIFT)) * APB_CLK / 4; in clk_get_pll_rate()
90 cpu_rate = APB_CLK; in clk_get_cpu_rate()
/bsp/loongson/ls1cdev/drivers/
A Dselfboot.h15 #define SD_FREQ (((APB_CLK / 4) * (PLL_MULT / CPU_DIV)) / SDRAM_PARAM_DIV_NUM)
139 #define APB_CLK (AHB_CLK) macro
A Dselfboot_gcc.S218 li a2, APB_CLK /* a2 = APB_CLK = 24Mhz (External Clock Freq) */
228 li v1, APB_CLK /* v1 = APB_CLK */
/bsp/loongson/ls1bdev/drivers/
A Ddisplay_controller.h40 #define APB_CLK 33333333 macro
A Ddisplay_controller.c121 caclulate_freq(APB_CLK/1000, vga_mode[i].pclk); in rt_dc_init()

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