| /bsp/lm4f232/Libraries/driverlib/ |
| A D | lpc.c | 95 ASSERT(ulBase == LPC0_BASE); in LPCConfigSet() 128 ASSERT(ulBase == LPC0_BASE); in LPCConfigGet() 158 ASSERT(ulBase == LPC0_BASE); in LPCStatusBlockAddressSet() 185 ASSERT(ulBase == LPC0_BASE); in LPCStatusBlockAddressGet() 217 ASSERT(ulBase == LPC0_BASE); in LPCStatusGet() 267 ASSERT(ulBase == LPC0_BASE); in LPCSCIAssert() 268 ASSERT(ulCount <= 3); in LPCSCIAssert() 314 ASSERT(ulBase == LPC0_BASE); in LPCIRQConfig() 367 ASSERT(ulBase == LPC0_BASE); in LPCIRQSet() 405 ASSERT(ulBase == LPC0_BASE); in LPCIRQClear() [all …]
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| A D | epi.c | 167 ASSERT(ulRefresh < 2048); in EPIConfigSDRAMSet() 245 ASSERT(ulMaxWait < 256); in EPIConfigHB8Set() 485 ASSERT(ulMap < 0x100); in EPIAddressMapSet() 533 ASSERT(ulChannel < 2); in EPINonBlockingReadConfigure() 585 ASSERT(ulChannel < 2); in EPINonBlockingReadStart() 621 ASSERT(ulChannel < 2); in EPINonBlockingReadStop() 656 ASSERT(ulChannel < 2); in EPINonBlockingReadCount() 726 ASSERT(pulBuf); in EPINonBlockingReadGet32() 781 ASSERT(pusBuf); in EPINonBlockingReadGet16() 836 ASSERT(pucBuf); in EPINonBlockingReadGet8() [all …]
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| A D | fan.c | 59 ASSERT(ulChannel <= 5); in FanChannelEnable() 86 ASSERT(ulChannel <= 5); in FanChannelDisable() 119 ASSERT(ulChannel <= 5); in FanChannelStatus() 165 ASSERT(ulChannel <= 5); in FanChannelConfigManual() 242 ASSERT(ulChannel <= 5); in FanChannelConfigAuto() 273 ASSERT(ulChannel <= 5); in FanChannelDutySet() 274 ASSERT(ulDuty < 512); in FanChannelDutySet() 308 ASSERT(ulChannel <= 5); in FanChannelDutyGet() 346 ASSERT(ulChannel <= 5); in FanChannelRPMSet() 347 ASSERT(ulRPM < 8192); in FanChannelRPMSet() [all …]
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| A D | adc.c | 96 ASSERT(ulSequenceNum < 4); in ADCIntRegister() 141 ASSERT(ulSequenceNum < 4); in ADCIntUnregister() 179 ASSERT(ulSequenceNum < 4); in ADCIntDisable() 208 ASSERT(ulSequenceNum < 4); in ADCIntEnable() 247 ASSERT(ulSequenceNum < 4); in ADCIntStatus() 308 ASSERT(ulSequenceNum < 4); in ADCIntClear() 336 ASSERT(ulSequenceNum < 4); in ADCSequenceEnable() 449 ASSERT(ulPriority < 4); in ADCSequenceConfigure() 1138 ASSERT(ulComp < 8); in ADCComparatorConfigure() 1174 ASSERT(ulComp < 8); in ADCComparatorRegionSet() [all …]
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| A D | udma.c | 855 ASSERT(pvTaskList != 0); in uDMAChannelScatterGatherSet() 856 ASSERT(ulTaskCount <= 1024); in uDMAChannelScatterGatherSet() 857 ASSERT(ulTaskCount != 0); in uDMAChannelScatterGatherSet() 1186 ASSERT(pfnHandler); in uDMAIntRegister() 1256 ASSERT(!CLASS_IS_SANDSTORM); in uDMAIntStatus() 1257 ASSERT(!CLASS_IS_FURY); in uDMAIntStatus() 1259 ASSERT(!CLASS_IS_TEMPEST); in uDMAIntStatus() 1292 ASSERT(!CLASS_IS_FURY); in uDMAIntClear() 1294 ASSERT(!CLASS_IS_TEMPEST); in uDMAIntClear() 1338 ASSERT(!CLASS_IS_FURY); in uDMAChannelAssign() [all …]
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| A D | peci.c | 137 ASSERT(ulPECIClk != 0); in PECIConfigSet() 141 ASSERT((ulPoll == 0) || in PECIConfigSet() 207 ASSERT(ulPECIClk != 0); in PECIConfigGet() 208 ASSERT(*pulBaud != 0); in PECIConfigGet() 209 ASSERT(*pulPoll != 0); in PECIConfigGet() 210 ASSERT(*pulOffset != 0); in PECIConfigGet() 211 ASSERT(*pulRetry != 0); in PECIConfigGet() 319 ASSERT(ulLow <= 0xFFFF); in PECIDomainConfigSet() 320 ASSERT(ulHigh > ulLow); in PECIDomainConfigSet() 364 ASSERT(pulHigh != 0); in PECIDomainConfigGet() [all …]
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| /bsp/lm3s8962/Libraries/driverlib/ |
| A D | lpc.c | 95 ASSERT(ulBase == LPC0_BASE); in LPCConfigSet() 128 ASSERT(ulBase == LPC0_BASE); in LPCConfigGet() 158 ASSERT(ulBase == LPC0_BASE); in LPCStatusBlockAddressSet() 185 ASSERT(ulBase == LPC0_BASE); in LPCStatusBlockAddressGet() 217 ASSERT(ulBase == LPC0_BASE); in LPCStatusGet() 267 ASSERT(ulBase == LPC0_BASE); in LPCSCIAssert() 268 ASSERT(ulCount <= 3); in LPCSCIAssert() 314 ASSERT(ulBase == LPC0_BASE); in LPCIRQConfig() 367 ASSERT(ulBase == LPC0_BASE); in LPCIRQSet() 405 ASSERT(ulBase == LPC0_BASE); in LPCIRQClear() [all …]
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| A D | epi.c | 167 ASSERT(ulRefresh < 2048); in EPIConfigSDRAMSet() 245 ASSERT(ulMaxWait < 256); in EPIConfigHB8Set() 485 ASSERT(ulMap < 0x100); in EPIAddressMapSet() 533 ASSERT(ulChannel < 2); in EPINonBlockingReadConfigure() 585 ASSERT(ulChannel < 2); in EPINonBlockingReadStart() 621 ASSERT(ulChannel < 2); in EPINonBlockingReadStop() 656 ASSERT(ulChannel < 2); in EPINonBlockingReadCount() 726 ASSERT(pulBuf); in EPINonBlockingReadGet32() 781 ASSERT(pusBuf); in EPINonBlockingReadGet16() 836 ASSERT(pucBuf); in EPINonBlockingReadGet8() [all …]
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| A D | fan.c | 59 ASSERT(ulChannel <= 5); in FanChannelEnable() 86 ASSERT(ulChannel <= 5); in FanChannelDisable() 119 ASSERT(ulChannel <= 5); in FanChannelStatus() 165 ASSERT(ulChannel <= 5); in FanChannelConfigManual() 242 ASSERT(ulChannel <= 5); in FanChannelConfigAuto() 273 ASSERT(ulChannel <= 5); in FanChannelDutySet() 274 ASSERT(ulDuty < 512); in FanChannelDutySet() 308 ASSERT(ulChannel <= 5); in FanChannelDutyGet() 346 ASSERT(ulChannel <= 5); in FanChannelRPMSet() 347 ASSERT(ulRPM < 8192); in FanChannelRPMSet() [all …]
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| A D | adc.c | 96 ASSERT(ulSequenceNum < 4); in ADCIntRegister() 141 ASSERT(ulSequenceNum < 4); in ADCIntUnregister() 179 ASSERT(ulSequenceNum < 4); in ADCIntDisable() 208 ASSERT(ulSequenceNum < 4); in ADCIntEnable() 247 ASSERT(ulSequenceNum < 4); in ADCIntStatus() 308 ASSERT(ulSequenceNum < 4); in ADCIntClear() 336 ASSERT(ulSequenceNum < 4); in ADCSequenceEnable() 449 ASSERT(ulPriority < 4); in ADCSequenceConfigure() 1138 ASSERT(ulComp < 8); in ADCComparatorConfigure() 1174 ASSERT(ulComp < 8); in ADCComparatorRegionSet() [all …]
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| A D | udma.c | 855 ASSERT(pvTaskList != 0); in uDMAChannelScatterGatherSet() 856 ASSERT(ulTaskCount <= 1024); in uDMAChannelScatterGatherSet() 857 ASSERT(ulTaskCount != 0); in uDMAChannelScatterGatherSet() 1186 ASSERT(pfnHandler); in uDMAIntRegister() 1256 ASSERT(!CLASS_IS_SANDSTORM); in uDMAIntStatus() 1257 ASSERT(!CLASS_IS_FURY); in uDMAIntStatus() 1259 ASSERT(!CLASS_IS_TEMPEST); in uDMAIntStatus() 1292 ASSERT(!CLASS_IS_FURY); in uDMAIntClear() 1294 ASSERT(!CLASS_IS_TEMPEST); in uDMAIntClear() 1338 ASSERT(!CLASS_IS_FURY); in uDMAChannelAssign() [all …]
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| A D | peci.c | 137 ASSERT(ulPECIClk != 0); in PECIConfigSet() 141 ASSERT((ulPoll == 0) || in PECIConfigSet() 207 ASSERT(ulPECIClk != 0); in PECIConfigGet() 208 ASSERT(*pulBaud != 0); in PECIConfigGet() 209 ASSERT(*pulPoll != 0); in PECIConfigGet() 210 ASSERT(*pulOffset != 0); in PECIConfigGet() 211 ASSERT(*pulRetry != 0); in PECIConfigGet() 319 ASSERT(ulLow <= 0xFFFF); in PECIDomainConfigSet() 320 ASSERT(ulHigh > ulLow); in PECIDomainConfigSet() 364 ASSERT(pulHigh != 0); in PECIDomainConfigGet() [all …]
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| /bsp/lm3s9b9x/Libraries/driverlib/ |
| A D | lpc.c | 95 ASSERT(ulBase == LPC0_BASE); in LPCConfigSet() 128 ASSERT(ulBase == LPC0_BASE); in LPCConfigGet() 158 ASSERT(ulBase == LPC0_BASE); in LPCStatusBlockAddressSet() 185 ASSERT(ulBase == LPC0_BASE); in LPCStatusBlockAddressGet() 217 ASSERT(ulBase == LPC0_BASE); in LPCStatusGet() 267 ASSERT(ulBase == LPC0_BASE); in LPCSCIAssert() 268 ASSERT(ulCount <= 3); in LPCSCIAssert() 314 ASSERT(ulBase == LPC0_BASE); in LPCIRQConfig() 367 ASSERT(ulBase == LPC0_BASE); in LPCIRQSet() 405 ASSERT(ulBase == LPC0_BASE); in LPCIRQClear() [all …]
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| A D | epi.c | 167 ASSERT(ulRefresh < 2048); in EPIConfigSDRAMSet() 245 ASSERT(ulMaxWait < 256); in EPIConfigHB8Set() 485 ASSERT(ulMap < 0x100); in EPIAddressMapSet() 533 ASSERT(ulChannel < 2); in EPINonBlockingReadConfigure() 585 ASSERT(ulChannel < 2); in EPINonBlockingReadStart() 621 ASSERT(ulChannel < 2); in EPINonBlockingReadStop() 656 ASSERT(ulChannel < 2); in EPINonBlockingReadCount() 726 ASSERT(pulBuf); in EPINonBlockingReadGet32() 781 ASSERT(pusBuf); in EPINonBlockingReadGet16() 836 ASSERT(pucBuf); in EPINonBlockingReadGet8() [all …]
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| A D | fan.c | 59 ASSERT(ulChannel <= 5); in FanChannelEnable() 86 ASSERT(ulChannel <= 5); in FanChannelDisable() 119 ASSERT(ulChannel <= 5); in FanChannelStatus() 165 ASSERT(ulChannel <= 5); in FanChannelConfigManual() 242 ASSERT(ulChannel <= 5); in FanChannelConfigAuto() 273 ASSERT(ulChannel <= 5); in FanChannelDutySet() 274 ASSERT(ulDuty < 512); in FanChannelDutySet() 308 ASSERT(ulChannel <= 5); in FanChannelDutyGet() 346 ASSERT(ulChannel <= 5); in FanChannelRPMSet() 347 ASSERT(ulRPM < 8192); in FanChannelRPMSet() [all …]
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| A D | adc.c | 96 ASSERT(ulSequenceNum < 4); in ADCIntRegister() 141 ASSERT(ulSequenceNum < 4); in ADCIntUnregister() 179 ASSERT(ulSequenceNum < 4); in ADCIntDisable() 208 ASSERT(ulSequenceNum < 4); in ADCIntEnable() 247 ASSERT(ulSequenceNum < 4); in ADCIntStatus() 308 ASSERT(ulSequenceNum < 4); in ADCIntClear() 336 ASSERT(ulSequenceNum < 4); in ADCSequenceEnable() 449 ASSERT(ulPriority < 4); in ADCSequenceConfigure() 1138 ASSERT(ulComp < 8); in ADCComparatorConfigure() 1174 ASSERT(ulComp < 8); in ADCComparatorRegionSet() [all …]
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| A D | udma.c | 855 ASSERT(pvTaskList != 0); in uDMAChannelScatterGatherSet() 856 ASSERT(ulTaskCount <= 1024); in uDMAChannelScatterGatherSet() 857 ASSERT(ulTaskCount != 0); in uDMAChannelScatterGatherSet() 1186 ASSERT(pfnHandler); in uDMAIntRegister() 1256 ASSERT(!CLASS_IS_SANDSTORM); in uDMAIntStatus() 1257 ASSERT(!CLASS_IS_FURY); in uDMAIntStatus() 1259 ASSERT(!CLASS_IS_TEMPEST); in uDMAIntStatus() 1292 ASSERT(!CLASS_IS_FURY); in uDMAIntClear() 1294 ASSERT(!CLASS_IS_TEMPEST); in uDMAIntClear() 1338 ASSERT(!CLASS_IS_FURY); in uDMAChannelAssign() [all …]
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| A D | peci.c | 137 ASSERT(ulPECIClk != 0); in PECIConfigSet() 141 ASSERT((ulPoll == 0) || in PECIConfigSet() 207 ASSERT(ulPECIClk != 0); in PECIConfigGet() 208 ASSERT(*pulBaud != 0); in PECIConfigGet() 209 ASSERT(*pulPoll != 0); in PECIConfigGet() 210 ASSERT(*pulOffset != 0); in PECIConfigGet() 211 ASSERT(*pulRetry != 0); in PECIConfigGet() 319 ASSERT(ulLow <= 0xFFFF); in PECIDomainConfigSet() 320 ASSERT(ulHigh > ulLow); in PECIDomainConfigSet() 364 ASSERT(pulHigh != 0); in PECIDomainConfigGet() [all …]
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| /bsp/msp432e401y-LaunchPad/libraries/msp432e4/driverlib/ |
| A D | epi.c | 341 ASSERT(ui32CS < 4); in EPIDividerCSSet() 762 ASSERT(ui32CS < 4); in EPIConfigHB8CSSet() 845 ASSERT(ui32CS < 4); in EPIConfigHB16CSSet() 920 ASSERT(ui32CS < 4); in EPIConfigHB8TimingSet() 991 ASSERT(ui32CS < 4); in EPIConfigHB16TimingSet() 1028 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegSet() 1083 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegRead() 1137 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegGetNonBlocking() 1594 ASSERT(pui32Buf); in EPINonBlockingReadGet32() 1649 ASSERT(pui16Buf); in EPINonBlockingReadGet16() [all …]
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| A D | lcd.c | 115 ASSERT(ui32Base == LCD0_BASE); in LCDModeSet() 136 ASSERT(ui32Div); in LCDModeSet() 137 ASSERT(ui32Div < 256); in LCDModeSet() 308 ASSERT(pTiming); in LCDIDDTimingSet() 727 ASSERT(!(ui32Count & 1)); in LCDIDDDMAWrite() 899 ASSERT(pTiming); in LCDRasterTimingSet() 979 ASSERT(ui8Count < 16); in LCDRasterACBiasIntCountSet() 1376 ASSERT(ui32Start < 256); in LCDRasterPaletteSet() 1378 ASSERT(pui32Addr); in LCDRasterPaletteSet() 1482 ASSERT(ui8Buffer < 2); in LCDRasterFrameBufferSet() [all …]
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| A D | pwm.c | 203 ASSERT(ui32Base == PWM0_BASE); in PWMGenConfigure() 204 ASSERT(_PWMGenValid(ui32Gen)); in PWMGenConfigure() 281 ASSERT(ui32Base == PWM0_BASE); in PWMGenPeriodSet() 476 ASSERT(ui32Width < ui32Reg); in PWMPulseWidthSet() 586 ASSERT(ui16Rise < 4096); in PWMDeadBandEnable() 587 ASSERT(ui16Fall < 4096); in PWMDeadBandEnable() 1005 ASSERT(ui32Int != 0); in PWMGenIntRegister() 1054 ASSERT(ui32Int != 0); in PWMGenIntUnregister() 1123 ASSERT(ui32Int != 0); in PWMFaultIntRegister() 1167 ASSERT(ui32Int != 0); in PWMFaultIntUnregister() [all …]
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| /bsp/tm4c129x/libraries/driverlib/ |
| A D | epi.c | 348 ASSERT(ui32CS < 4); in EPIDividerCSSet() 798 ASSERT(ui32CS < 4); in EPIConfigHB8CSSet() 885 ASSERT(ui32CS < 4); in EPIConfigHB16CSSet() 964 ASSERT(ui32CS < 4); in EPIConfigHB8TimingSet() 1039 ASSERT(ui32CS < 4); in EPIConfigHB16TimingSet() 1080 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegSet() 1139 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegRead() 1197 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegGetNonBlocking() 1662 ASSERT(pui32Buf); in EPINonBlockingReadGet32() 1717 ASSERT(pui16Buf); in EPINonBlockingReadGet16() [all …]
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| A D | lcd.c | 118 ASSERT(ui32Base == LCD0_BASE); in LCDModeSet() 139 ASSERT(ui32Div); in LCDModeSet() 140 ASSERT(ui32Div < 256); in LCDModeSet() 311 ASSERT(pTiming); in LCDIDDTimingSet() 730 ASSERT(!(ui32Count & 1)); in LCDIDDDMAWrite() 902 ASSERT(pTiming); in LCDRasterTimingSet() 982 ASSERT(ui8Count < 16); in LCDRasterACBiasIntCountSet() 1379 ASSERT(ui32Start < 256); in LCDRasterPaletteSet() 1381 ASSERT(pui32Addr); in LCDRasterPaletteSet() 1485 ASSERT(ui8Buffer < 2); in LCDRasterFrameBufferSet() [all …]
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| /bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/src/ |
| A D | epi.c | 348 ASSERT(ui32CS < 4); in EPIDividerCSSet() 798 ASSERT(ui32CS < 4); in EPIConfigHB8CSSet() 885 ASSERT(ui32CS < 4); in EPIConfigHB16CSSet() 964 ASSERT(ui32CS < 4); in EPIConfigHB8TimingSet() 1039 ASSERT(ui32CS < 4); in EPIConfigHB16TimingSet() 1080 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegSet() 1139 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegRead() 1197 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegGetNonBlocking() 1662 ASSERT(pui32Buf); in EPINonBlockingReadGet32() 1717 ASSERT(pui16Buf); in EPINonBlockingReadGet16() [all …]
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| A D | lcd.c | 118 ASSERT(ui32Base == LCD0_BASE); in LCDModeSet() 139 ASSERT(ui32Div); in LCDModeSet() 140 ASSERT(ui32Div < 256); in LCDModeSet() 311 ASSERT(pTiming); in LCDIDDTimingSet() 730 ASSERT(!(ui32Count & 1)); in LCDIDDDMAWrite() 902 ASSERT(pTiming); in LCDRasterTimingSet() 982 ASSERT(ui8Count < 16); in LCDRasterACBiasIntCountSet() 1379 ASSERT(ui32Start < 256); in LCDRasterPaletteSet() 1381 ASSERT(pui32Addr); in LCDRasterPaletteSet() 1485 ASSERT(ui8Buffer < 2); in LCDRasterFrameBufferSet() [all …]
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