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Searched refs:BMCR_RESET (Results 1 – 14 of 14) sorted by relevance

/bsp/sam7x/drivers/
A Dsam7x_emac.h44 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ macro
/bsp/mini4020/drivers/
A Dmii.h48 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ macro
/bsp/at91/at91sam9260/drivers/
A Dmii.h49 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ macro
/bsp/at91/at91sam9g45/drivers/
A Dmii.h49 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ macro
/bsp/dm365/drivers/
A Dmii.h50 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ macro
/bsp/allwinner/libraries/sunxi-hal/include/hal/phy/
A Dsunxi_hal_mii.h71 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ macro
A Dsunxi_hal_mdio.h98 #define MDIO_CTRL1_RESET BMCR_RESET
/bsp/allwinner/libraries/sunxi-hal/hal/source/phy/
A Dhal_phy.c722 reg |= BMCR_RESET; in phy_reset()
737 while ((reg & BMCR_RESET) && timeout--) { in phy_reset()
747 if (reg & BMCR_RESET) { in phy_reset()
A Dhal_miiphyutil.c426 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
/bsp/loongson/ls1cdev/drivers/net/
A Dmii.h51 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ macro
/bsp/loongson/ls2kdev/drivers/net/
A Dmii.h49 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ macro
/bsp/nuvoton/libraries/m460/rtt_port/emac/
A Dmii.h49 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ macro
/bsp/nuvoton/libraries/ma35/rtt_port/gmac/
A Dmii.h49 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ macro
/bsp/allwinner/libraries/sunxi-hal/hal/source/gmac/
A Dhal_geth.c520 geth_phy_write((char *)dev, phy_addr, MII_BMCR, phy_val | BMCR_RESET); in geth_phy_init()
521 while (geth_phy_read((char *)dev, phy_addr, MII_BMCR,NULL) & BMCR_RESET); in geth_phy_init()

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