Searched refs:BSP_CFG_CLMA3_CMPL (Results 1 – 6 of 6) sorted by relevance

/bsp/renesas/rzn2l_etherkit/rzn_gen/
A D	bsp_clock_cfg.h	20 #define BSP_CFG_CLMA3_CMPL (1) /* CLMA3 CMPL 1 */ macro
/bsp/renesas/rzn2l_rsk/rzn_gen/
A D	bsp_clock_cfg.h	20 #define BSP_CFG_CLMA3_CMPL (1) /* CLMA3 CMPL 1 */ macro
/bsp/renesas/rzt2m_rsk/rzt_gen/
A D	bsp_clock_cfg.h	20 #define BSP_CFG_CLMA3_CMPL (1) /* CLMA3 CMPL 1 */ macro
/bsp/renesas/rzn2l_etherkit/rzn/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	347 R_CLMA3->CMPL = BSP_CFG_CLMA3_CMPL; in bsp_clock_init()
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	347 R_CLMA3->CMPL = BSP_CFG_CLMA3_CMPL; in bsp_clock_init()
/bsp/renesas/rzt2m_rsk/rzt/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	379 R_CLMA3->CMPL = BSP_CFG_CLMA3_CMPL; in bsp_clock_init()

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