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Searched refs:BSP_CFG_CLOCKS_SECURE (Results 1 – 25 of 42) sorted by relevance

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/bsp/renesas/ra8m1-ek/ra_cfg/fsp_cfg/bsp/
A Dbsp_mcu_family_cfg.h58 … #define BSP_TZ_CFG_INIT_SECURE_ONLY (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
181 #define BSP_TZ_CFG_LPMSAR ((RA_NOT_DEFINED > 0) ? BSP_CFG_CLOCKS_SECURE == 0 : (\
183 (BSP_CFG_CLOCKS_SECURE == 0)))
196 #if BSP_CFG_CLOCKS_SECURE
281 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 0) : 0U) | /* FLWTSA */\
283 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 8) : 0U) | /* FCKMHZSA */ \
296 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 8U) : 0U) /* SRAMWTSA */)
336 …SEL (0x00000000U | ((0U << 0U)) | ((0U << 3U)) | ((0U << 5U)) | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x…
/bsp/renesas/ra8d1-ek/ra_cfg/fsp_cfg/bsp/
A Dbsp_mcu_family_cfg.h58 … #define BSP_TZ_CFG_INIT_SECURE_ONLY (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
182 #define BSP_TZ_CFG_LPMSAR ((RA_NOT_DEFINED > 0) ? BSP_CFG_CLOCKS_SECURE == 0 : (\
184 (BSP_CFG_CLOCKS_SECURE == 0)))
201 #if BSP_CFG_CLOCKS_SECURE
286 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 0) : 0U) | /* FLWTSA */\
288 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 8) : 0U) | /* FCKMHZSA */ \
301 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 8U) : 0U) /* SRAMWTSA */)
341 …SEL (0x00000000U | ((0U << 0U)) | ((0U << 3U)) | ((0U << 5U)) | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x…
/bsp/renesas/ra8d1-vision-board/ra_cfg/fsp_cfg/bsp/
A Dbsp_mcu_family_cfg.h58 … #define BSP_TZ_CFG_INIT_SECURE_ONLY (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
182 #define BSP_TZ_CFG_LPMSAR ((RA_NOT_DEFINED > 0) ? BSP_CFG_CLOCKS_SECURE == 0 : (\
184 (BSP_CFG_CLOCKS_SECURE == 0)))
201 #if BSP_CFG_CLOCKS_SECURE
286 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 0) : 0U) | /* FLWTSA */\
288 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 8) : 0U) | /* FCKMHZSA */ \
301 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 8U) : 0U) /* SRAMWTSA */)
341 …SEL (0x00000000U | ((0U << 0U)) | ((0U << 3U)) | ((0U << 5U)) | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x…
/bsp/renesas/ra6m4-cpk/ra_cfg/fsp_cfg/bsp/
A Dbsp_mcu_family_cfg.h40 … #define BSP_TZ_CFG_INIT_SECURE_ONLY (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
176 #if BSP_CFG_CLOCKS_SECURE
257 #if BSP_CFG_CLOCKS_SECURE
272 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | \
308 …#define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((R…
/bsp/renesas/ebf_qi_min_6m5/ra_cfg/fsp_cfg/bsp/
A Dbsp_mcu_family_cfg.h43 … #define BSP_TZ_CFG_INIT_SECURE_ONLY (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
179 #if BSP_CFG_CLOCKS_SECURE
260 #if BSP_CFG_CLOCKS_SECURE
275 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | \
316 …#define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((R…
/bsp/renesas/ra4m2-eco/ra_cfg/fsp_cfg/bsp/
A Dbsp_mcu_family_cfg.h44 … #define BSP_TZ_CFG_INIT_SECURE_ONLY (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
178 #if BSP_CFG_CLOCKS_SECURE
259 #if BSP_CFG_CLOCKS_SECURE
274 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | \
310 …#define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((R…
/bsp/renesas/ra6m4-iot/ra_cfg/fsp_cfg/bsp/
A Dbsp_mcu_family_cfg.h40 … #define BSP_TZ_CFG_INIT_SECURE_ONLY (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
176 #if BSP_CFG_CLOCKS_SECURE
257 #if BSP_CFG_CLOCKS_SECURE
272 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | \
308 …#define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((R…
/bsp/renesas/ra6m3-hmi-board/ra/fsp/src/bsp/mcu/all/
A Dbsp_common.h368 uint32_t sckdivcr = FSP_STYPE3_REG32_READ(R_SYSTEM->SCKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SystemClockHzGet()
378 …uint32_t cpuclk_div = FSP_STYPE3_REG8_READ(R_SYSTEM->SCKDIVCR2, BSP_CFG_CLOCKS_SECURE) & FSP_PRV_S… in R_FSP_SystemClockHzGet()
468 …t32_t spidivcr = FSP_STYPE3_REG8_READ(R_SYSTEM->SPICKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SpiClockHzGet()
472 … BSP_CFG_CLOCKS_SECURE) & R_SYSTEM_SPICKCR_CKSEL_Msk) >> in R_FSP_SpiClockHzGet()
488 …t32_t scidivcr = FSP_STYPE3_REG8_READ(R_SYSTEM->SCICKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SciClockHzGet()
492 … BSP_CFG_CLOCKS_SECURE) & R_SYSTEM_SCICKCR_SCICKSEL_Msk >> in R_FSP_SciClockHzGet()
A Dbsp_guard.c27 #if BSP_CFG_CLOCKS_SECURE == 1
/bsp/renesas/ra8d1-ek/ra/fsp/src/bsp/mcu/all/
A Dbsp_common.h368 uint32_t sckdivcr = FSP_STYPE3_REG32_READ(R_SYSTEM->SCKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SystemClockHzGet()
378 …uint32_t cpuclk_div = FSP_STYPE3_REG8_READ(R_SYSTEM->SCKDIVCR2, BSP_CFG_CLOCKS_SECURE) & FSP_PRV_S… in R_FSP_SystemClockHzGet()
468 …t32_t spidivcr = FSP_STYPE3_REG8_READ(R_SYSTEM->SPICKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SpiClockHzGet()
472 … BSP_CFG_CLOCKS_SECURE) & R_SYSTEM_SPICKCR_CKSEL_Msk) >> in R_FSP_SpiClockHzGet()
488 …t32_t scidivcr = FSP_STYPE3_REG8_READ(R_SYSTEM->SCICKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SciClockHzGet()
492 … BSP_CFG_CLOCKS_SECURE) & R_SYSTEM_SCICKCR_SCICKSEL_Msk >> in R_FSP_SciClockHzGet()
A Dbsp_guard.c27 #if BSP_CFG_CLOCKS_SECURE == 1
/bsp/renesas/ra8d1-vision-board/ra/fsp/src/bsp/mcu/all/
A Dbsp_common.h368 uint32_t sckdivcr = FSP_STYPE3_REG32_READ(R_SYSTEM->SCKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SystemClockHzGet()
378 …uint32_t cpuclk_div = FSP_STYPE3_REG8_READ(R_SYSTEM->SCKDIVCR2, BSP_CFG_CLOCKS_SECURE) & FSP_PRV_S… in R_FSP_SystemClockHzGet()
468 …t32_t spidivcr = FSP_STYPE3_REG8_READ(R_SYSTEM->SPICKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SpiClockHzGet()
472 … BSP_CFG_CLOCKS_SECURE) & R_SYSTEM_SPICKCR_CKSEL_Msk) >> in R_FSP_SpiClockHzGet()
488 …t32_t scidivcr = FSP_STYPE3_REG8_READ(R_SYSTEM->SCICKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SciClockHzGet()
492 … BSP_CFG_CLOCKS_SECURE) & R_SYSTEM_SCICKCR_SCICKSEL_Msk >> in R_FSP_SciClockHzGet()
A Dbsp_guard.c27 #if BSP_CFG_CLOCKS_SECURE == 1
/bsp/renesas/ra8m1-ek/ra/fsp/src/bsp/mcu/all/
A Dbsp_common.h368 uint32_t sckdivcr = FSP_STYPE3_REG32_READ(R_SYSTEM->SCKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SystemClockHzGet()
378 …uint32_t cpuclk_div = FSP_STYPE3_REG8_READ(R_SYSTEM->SCKDIVCR2, BSP_CFG_CLOCKS_SECURE) & FSP_PRV_S… in R_FSP_SystemClockHzGet()
468 …t32_t spidivcr = FSP_STYPE3_REG8_READ(R_SYSTEM->SPICKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SpiClockHzGet()
472 … BSP_CFG_CLOCKS_SECURE) & R_SYSTEM_SPICKCR_CKSEL_Msk) >> in R_FSP_SpiClockHzGet()
488 …t32_t scidivcr = FSP_STYPE3_REG8_READ(R_SYSTEM->SCICKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SciClockHzGet()
492 … BSP_CFG_CLOCKS_SECURE) & R_SYSTEM_SCICKCR_SCICKSEL_Msk >> in R_FSP_SciClockHzGet()
A Dbsp_guard.c27 #if BSP_CFG_CLOCKS_SECURE == 1
/bsp/renesas/ra4e2-eco/ra/fsp/src/bsp/mcu/all/
A Dbsp_common.h365 uint32_t sckdivcr = FSP_STYPE3_REG32_READ(R_SYSTEM->SCKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SystemClockHzGet()
375 …uint32_t cpuclk_div = FSP_STYPE3_REG8_READ(R_SYSTEM->SCKDIVCR2, BSP_CFG_CLOCKS_SECURE) & FSP_PRV_S… in R_FSP_SystemClockHzGet()
486 …t32_t spidivcr = FSP_STYPE3_REG8_READ(R_SYSTEM->SPICKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SpiClockHzGet()
490 … BSP_CFG_CLOCKS_SECURE) & R_SYSTEM_SPICKCR_CKSEL_Msk) >> in R_FSP_SpiClockHzGet()
506 …t32_t scidivcr = FSP_STYPE3_REG8_READ(R_SYSTEM->SCICKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SciClockHzGet()
510 … BSP_CFG_CLOCKS_SECURE) & R_SYSTEM_SCICKCR_SCICKSEL_Msk >> in R_FSP_SciClockHzGet()
A Dbsp_guard.c13 #if BSP_CFG_CLOCKS_SECURE == 1
/bsp/renesas/ra6e2-fpb/ra/fsp/src/bsp/mcu/all/
A Dbsp_common.h362 uint32_t sckdivcr = FSP_STYPE3_REG32_READ(R_SYSTEM->SCKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SystemClockHzGet()
372 …uint32_t cpuclk_div = FSP_STYPE3_REG8_READ(R_SYSTEM->SCKDIVCR2, BSP_CFG_CLOCKS_SECURE) & FSP_PRV_S… in R_FSP_SystemClockHzGet()
483 …t32_t spidivcr = FSP_STYPE3_REG8_READ(R_SYSTEM->SPICKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SpiClockHzGet()
487 … BSP_CFG_CLOCKS_SECURE) & R_SYSTEM_SPICKCR_CKSEL_Msk) >> in R_FSP_SpiClockHzGet()
503 …t32_t scidivcr = FSP_STYPE3_REG8_READ(R_SYSTEM->SCICKDIVCR, BSP_CFG_CLOCKS_SECURE); in R_FSP_SciClockHzGet()
507 … BSP_CFG_CLOCKS_SECURE) & R_SYSTEM_SCICKCR_SCICKSEL_Msk >> in R_FSP_SciClockHzGet()
A Dbsp_guard.c13 #if BSP_CFG_CLOCKS_SECURE == 1
/bsp/renesas/ra4e2-eco/ra_cfg/fsp_cfg/bsp/
A Dbsp_mcu_family_cfg.h44 … #define BSP_TZ_CFG_INIT_SECURE_ONLY (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
161 #if BSP_CFG_CLOCKS_SECURE
236 #if BSP_CFG_CLOCKS_SECURE
251 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | \
/bsp/renesas/ra6e2-fpb/ra_cfg/fsp_cfg/bsp/
A Dbsp_mcu_family_cfg.h44 … #define BSP_TZ_CFG_INIT_SECURE_ONLY (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
160 #if BSP_CFG_CLOCKS_SECURE
240 #if BSP_CFG_CLOCKS_SECURE
255 ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | \
/bsp/renesas/ra2l1-cpk/ra_gen/
A Dbsp_clock_cfg.h4 #define BSP_CFG_CLOCKS_SECURE (0) macro
/bsp/renesas/ra6m3-ek/ra_gen/
A Dbsp_clock_cfg.h4 #define BSP_CFG_CLOCKS_SECURE (0) macro
/bsp/renesas/ra6m3-hmi-board/ra_gen/
A Dbsp_clock_cfg.h4 #define BSP_CFG_CLOCKS_SECURE (0) macro
/bsp/renesas/ra4m2-eco/ra_gen/
A Dbsp_clock_cfg.h4 #define BSP_CFG_CLOCKS_SECURE (0) macro

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