BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (reference) in projects: bsp

Searched refs:BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (Results 1 – 15 of 15) sorted by relevance

/bsp/renesas/ra6m4-cpk/ra/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`137 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 138 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 141 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 142 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 144 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) 154 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION) 161 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/ra6m4-iot/ra/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`137 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 138 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 141 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 142 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 144 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) 154 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION) 161 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/ra2l1-cpk/ra/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`137 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 138 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 141 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 142 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 144 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) 154 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION) 161 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/ra6m3-ek/ra/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`137 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 138 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 141 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 142 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 144 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) 154 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION) 161 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/ebf_qi_min_6m5/ra/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`143 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 144 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 147 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 148 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 150 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) 160 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION) 167 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/ra4m2-eco/ra/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`143 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 144 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 147 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 148 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 150 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) 160 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION) 167 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/ra6m3-hmi-board/ra/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`148 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 149 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 152 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 153 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 155 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) 165 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION) 172 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/ra8d1-ek/ra/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`148 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 149 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 152 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 153 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 155 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) 165 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION) 172 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/ra8d1-vision-board/ra/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`148 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 149 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 152 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 153 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 155 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) 165 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION) 172 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/ra8m1-ek/ra/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`148 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 149 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 152 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 153 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 155 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) 165 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION) 172 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/ra4e2-eco/ra/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`138 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 139 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 142 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 143 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 145 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) 155 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION) 162 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/ra6e2-fpb/ra/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`135 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 136 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 139 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 140 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 142 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) 152 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION) 159 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`179 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 180 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 192 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/rzn2l_etherkit/rzn/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`179 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 180 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 192 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`
/bsp/renesas/rzt2m_rsk/rzt/fsp/src/bsp/mcu/all/
A D	bsp_common.h	`179 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION 180 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U) macro 192 … FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION…`

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