BSP_CFG_PL2ODIVR (reference) in projects: bsp

Searched refs:BSP_CFG_PL2ODIVR (Results 1 – 11 of 11) sorted by relevance

/bsp/renesas/ra8m1-ek/ra_gen/
A D	bsp_clock_cfg.h	`26 #define BSP_CFG_PL2ODIVR (BSP_CLOCKS_PLL_DIV_2) /* PLL2R Div /2 */ macro`
/bsp/renesas/ra8d1-ek/ra_gen/
A D	bsp_clock_cfg.h	`26 #define BSP_CFG_PL2ODIVR (BSP_CLOCKS_PLL_DIV_2) /* PLL2R Div /2 */ macro`
/bsp/renesas/ra8d1-vision-board/ra_gen/
A D	bsp_clock_cfg.h	`26 #define BSP_CFG_PL2ODIVR (BSP_CLOCKS_PLL_DIV_2) /* PLL2R Div /2 */ macro`
/bsp/renesas/ra4m2-eco/ra/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	`321 …#define BSP_PRV_PLL2CCR2 (((BSP_CFG_PL2ODIVR & BSP_PRV_PLL2CCR2_PLL_DIV…`
/bsp/renesas/ebf_qi_min_6m5/ra/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	`317 …#define BSP_PRV_PLL2CCR2 (((BSP_CFG_PL2ODIVR & BSP_PRV_PLL2CCR2_PLL_DIV…`
/bsp/renesas/ra8d1-ek/ra/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	`320 …#define BSP_PRV_PLL2CCR2 (((BSP_CFG_PL2ODIVR & BSP_PRV_PLL2CCR2_PLL_DIV…`
/bsp/renesas/ra8m1-ek/ra/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	`320 …#define BSP_PRV_PLL2CCR2 (((BSP_CFG_PL2ODIVR & BSP_PRV_PLL2CCR2_PLL_DIV…`
/bsp/renesas/ra8d1-vision-board/ra/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	`320 …#define BSP_PRV_PLL2CCR2 (((BSP_CFG_PL2ODIVR & BSP_PRV_PLL2CCR2_PLL_DIV…`
/bsp/renesas/ra6m3-hmi-board/ra/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	`320 …#define BSP_PRV_PLL2CCR2 (((BSP_CFG_PL2ODIVR & BSP_PRV_PLL2CCR2_PLL_DIV…`
/bsp/renesas/ra6e2-fpb/ra/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	`387 …#define BSP_PRV_PLL2CCR2 (((BSP_CFG_PL2ODIVR & BSP_PRV_PLL2CCR2_PLL_DIV…`
/bsp/renesas/ra4e2-eco/ra/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	`398 …#define BSP_PRV_PLL2CCR2 (((BSP_CFG_PL2ODIVR & BSP_PRV_PLL2CCR2_PLL_DIV…`

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