BSP_CFG_PLL1 (reference) in projects: bsp

Searched refs:BSP_CFG_PLL1 (Results 1 – 6 of 6) sorted by relevance

/bsp/renesas/rzn2l_etherkit/rzn_gen/
A D	bsp_clock_cfg.h	`8 #define BSP_CFG_PLL1 (BSP_CLOCKS_PLL1_INITIAL) /* PLL1 is initial state */ macro`
/bsp/renesas/rzn2l_rsk/rzn_gen/
A D	bsp_clock_cfg.h	`8 #define BSP_CFG_PLL1 (BSP_CLOCKS_PLL1_INITIAL) /* PLL1 is initial state */ macro`
/bsp/renesas/rzt2m_rsk/rzt_gen/
A D	bsp_clock_cfg.h	`8 #define BSP_CFG_PLL1 (BSP_CLOCKS_PLL1_INITIAL) /* PLL1 is initial state */ macro`
/bsp/renesas/rzn2l_etherkit/rzn/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	`258 #if (BSP_CLOCKS_PLL1_INITIAL != BSP_CFG_PLL1) in bsp_clock_init() 259 R_SYSC_S->PLL1EN = BSP_CFG_PLL1; in bsp_clock_init()`
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	`258 #if (BSP_CLOCKS_PLL1_INITIAL != BSP_CFG_PLL1) in bsp_clock_init() 259 R_SYSC_S->PLL1EN = BSP_CFG_PLL1; in bsp_clock_init()`
/bsp/renesas/rzt2m_rsk/rzt/fsp/src/bsp/mcu/all/
A D	bsp_clocks.c	`290 #if (BSP_CLOCKS_PLL1_INITIAL != BSP_CFG_PLL1) in bsp_clock_init() 291 R_SYSC_S->PLL1EN = BSP_CFG_PLL1; in bsp_clock_init()`

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