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Searched refs:BSP_CFG_UCK_DIV (Results 1 – 23 of 23) sorted by relevance

/bsp/renesas/ra6m3-ek/ra_gen/
A Dbsp_clock_cfg.h20 #define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */ macro
/bsp/renesas/ra6m3-hmi-board/ra_gen/
A Dbsp_clock_cfg.h20 #define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */ macro
/bsp/renesas/ra4m2-eco/ra_gen/
A Dbsp_clock_cfg.h24 #define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */ macro
/bsp/renesas/ra6m4-cpk/ra_gen/
A Dbsp_clock_cfg.h27 #define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */ macro
/bsp/renesas/ra6m4-iot/ra_gen/
A Dbsp_clock_cfg.h27 #define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */ macro
/bsp/renesas/ra4e2-eco/ra_gen/
A Dbsp_clock_cfg.h24 #define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */ macro
/bsp/renesas/ra6e2-fpb/ra_gen/
A Dbsp_clock_cfg.h24 #define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */ macro
/bsp/renesas/ra4m2-eco/ra/fsp/src/bsp/mcu/all/
A Dbsp_clocks.c87 #ifdef BSP_CFG_UCK_DIV
94 #define BSP_PRV_UCK_DIV (BSP_CFG_UCK_DIV)
98 #if BSP_CLOCKS_USB_CLOCK_DIV_1 == BSP_CFG_UCK_DIV
100 #elif BSP_CLOCKS_USB_CLOCK_DIV_2 == BSP_CFG_UCK_DIV
102 #elif BSP_CLOCKS_USB_CLOCK_DIV_3 == BSP_CFG_UCK_DIV
104 #elif BSP_CLOCKS_USB_CLOCK_DIV_4 == BSP_CFG_UCK_DIV
106 #elif BSP_CLOCKS_USB_CLOCK_DIV_5 == BSP_CFG_UCK_DIV
108 #elif BSP_CLOCKS_USB_CLOCK_DIV_6 == BSP_CFG_UCK_DIV
110 #elif BSP_CLOCKS_USB_CLOCK_DIV_8 == BSP_CFG_UCK_DIV
/bsp/renesas/ebf_qi_min_6m5/ra_gen/
A Dbsp_clock_cfg.h30 #define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */ macro
/bsp/renesas/ebf_qi_min_6m5/ra/fsp/src/bsp/mcu/all/
A Dbsp_clocks.c87 #ifdef BSP_CFG_UCK_DIV
94 #define BSP_PRV_UCK_DIV (BSP_CFG_UCK_DIV)
98 #if BSP_CLOCKS_USB_CLOCK_DIV_1 == BSP_CFG_UCK_DIV
100 #elif BSP_CLOCKS_USB_CLOCK_DIV_2 == BSP_CFG_UCK_DIV
102 #elif BSP_CLOCKS_USB_CLOCK_DIV_3 == BSP_CFG_UCK_DIV
104 #elif BSP_CLOCKS_USB_CLOCK_DIV_4 == BSP_CFG_UCK_DIV
106 #elif BSP_CLOCKS_USB_CLOCK_DIV_5 == BSP_CFG_UCK_DIV
108 #elif BSP_CLOCKS_USB_CLOCK_DIV_6 == BSP_CFG_UCK_DIV
110 #elif BSP_CLOCKS_USB_CLOCK_DIV_8 == BSP_CFG_UCK_DIV
/bsp/renesas/ra8m1-ek/ra_gen/
A Dbsp_clock_cfg.h53 #define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCK Div /5 */ macro
/bsp/renesas/ra8d1-ek/ra/fsp/src/bsp/mcu/all/
A Dbsp_clocks.c90 #ifdef BSP_CFG_UCK_DIV
97 #define BSP_PRV_UCK_DIV (BSP_CFG_UCK_DIV)
101 #if BSP_CLOCKS_USB_CLOCK_DIV_1 == BSP_CFG_UCK_DIV
103 #elif BSP_CLOCKS_USB_CLOCK_DIV_2 == BSP_CFG_UCK_DIV
105 #elif BSP_CLOCKS_USB_CLOCK_DIV_3 == BSP_CFG_UCK_DIV
107 #elif BSP_CLOCKS_USB_CLOCK_DIV_4 == BSP_CFG_UCK_DIV
109 #elif BSP_CLOCKS_USB_CLOCK_DIV_5 == BSP_CFG_UCK_DIV
111 #elif BSP_CLOCKS_USB_CLOCK_DIV_6 == BSP_CFG_UCK_DIV
113 #elif BSP_CLOCKS_USB_CLOCK_DIV_8 == BSP_CFG_UCK_DIV
/bsp/renesas/ra8m1-ek/ra/fsp/src/bsp/mcu/all/
A Dbsp_clocks.c90 #ifdef BSP_CFG_UCK_DIV
97 #define BSP_PRV_UCK_DIV (BSP_CFG_UCK_DIV)
101 #if BSP_CLOCKS_USB_CLOCK_DIV_1 == BSP_CFG_UCK_DIV
103 #elif BSP_CLOCKS_USB_CLOCK_DIV_2 == BSP_CFG_UCK_DIV
105 #elif BSP_CLOCKS_USB_CLOCK_DIV_3 == BSP_CFG_UCK_DIV
107 #elif BSP_CLOCKS_USB_CLOCK_DIV_4 == BSP_CFG_UCK_DIV
109 #elif BSP_CLOCKS_USB_CLOCK_DIV_5 == BSP_CFG_UCK_DIV
111 #elif BSP_CLOCKS_USB_CLOCK_DIV_6 == BSP_CFG_UCK_DIV
113 #elif BSP_CLOCKS_USB_CLOCK_DIV_8 == BSP_CFG_UCK_DIV
/bsp/renesas/ra8d1-vision-board/ra/fsp/src/bsp/mcu/all/
A Dbsp_clocks.c90 #ifdef BSP_CFG_UCK_DIV
97 #define BSP_PRV_UCK_DIV (BSP_CFG_UCK_DIV)
101 #if BSP_CLOCKS_USB_CLOCK_DIV_1 == BSP_CFG_UCK_DIV
103 #elif BSP_CLOCKS_USB_CLOCK_DIV_2 == BSP_CFG_UCK_DIV
105 #elif BSP_CLOCKS_USB_CLOCK_DIV_3 == BSP_CFG_UCK_DIV
107 #elif BSP_CLOCKS_USB_CLOCK_DIV_4 == BSP_CFG_UCK_DIV
109 #elif BSP_CLOCKS_USB_CLOCK_DIV_5 == BSP_CFG_UCK_DIV
111 #elif BSP_CLOCKS_USB_CLOCK_DIV_6 == BSP_CFG_UCK_DIV
113 #elif BSP_CLOCKS_USB_CLOCK_DIV_8 == BSP_CFG_UCK_DIV
/bsp/renesas/ra6m3-hmi-board/ra/fsp/src/bsp/mcu/all/
A Dbsp_clocks.c90 #ifdef BSP_CFG_UCK_DIV
97 #define BSP_PRV_UCK_DIV (BSP_CFG_UCK_DIV)
101 #if BSP_CLOCKS_USB_CLOCK_DIV_1 == BSP_CFG_UCK_DIV
103 #elif BSP_CLOCKS_USB_CLOCK_DIV_2 == BSP_CFG_UCK_DIV
105 #elif BSP_CLOCKS_USB_CLOCK_DIV_3 == BSP_CFG_UCK_DIV
107 #elif BSP_CLOCKS_USB_CLOCK_DIV_4 == BSP_CFG_UCK_DIV
109 #elif BSP_CLOCKS_USB_CLOCK_DIV_5 == BSP_CFG_UCK_DIV
111 #elif BSP_CLOCKS_USB_CLOCK_DIV_6 == BSP_CFG_UCK_DIV
113 #elif BSP_CLOCKS_USB_CLOCK_DIV_8 == BSP_CFG_UCK_DIV
/bsp/renesas/ra8d1-ek/ra_gen/
A Dbsp_clock_cfg.h55 #define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCK Div /5 */ macro
/bsp/renesas/ra8d1-vision-board/ra_gen/
A Dbsp_clock_cfg.h55 #define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCK Div /5 */ macro
/bsp/renesas/ra6e2-fpb/ra/fsp/src/bsp/mcu/all/
A Dbsp_clocks.c119 #ifdef BSP_CFG_UCK_DIV
126 #define BSP_PRV_UCK_DIV (BSP_CFG_UCK_DIV)
130 #if BSP_CLOCKS_USB_CLOCK_DIV_1 == BSP_CFG_UCK_DIV
132 #elif BSP_CLOCKS_USB_CLOCK_DIV_2 == BSP_CFG_UCK_DIV
134 #elif BSP_CLOCKS_USB_CLOCK_DIV_3 == BSP_CFG_UCK_DIV
136 #elif BSP_CLOCKS_USB_CLOCK_DIV_4 == BSP_CFG_UCK_DIV
138 #elif BSP_CLOCKS_USB_CLOCK_DIV_5 == BSP_CFG_UCK_DIV
140 #elif BSP_CLOCKS_USB_CLOCK_DIV_6 == BSP_CFG_UCK_DIV
142 #elif BSP_CLOCKS_USB_CLOCK_DIV_8 == BSP_CFG_UCK_DIV
144 #elif BSP_CLOCKS_USB_CLOCK_DIV_10 == BSP_CFG_UCK_DIV
[all …]
/bsp/renesas/ra6m4-cpk/ra/fsp/src/bsp/mcu/all/
A Dbsp_clocks.c76 #ifdef BSP_CFG_UCK_DIV
83 #define BSP_PRV_UCK_DIV (BSP_CFG_UCK_DIV)
88 #if BSP_CLOCKS_USB_CLOCK_DIV_3 == BSP_CFG_UCK_DIV
90 #elif BSP_CLOCKS_USB_CLOCK_DIV_4 == BSP_CFG_UCK_DIV
92 #elif BSP_CLOCKS_USB_CLOCK_DIV_5 == BSP_CFG_UCK_DIV
/bsp/renesas/ra6m4-iot/ra/fsp/src/bsp/mcu/all/
A Dbsp_clocks.c76 #ifdef BSP_CFG_UCK_DIV
83 #define BSP_PRV_UCK_DIV (BSP_CFG_UCK_DIV)
88 #if BSP_CLOCKS_USB_CLOCK_DIV_3 == BSP_CFG_UCK_DIV
90 #elif BSP_CLOCKS_USB_CLOCK_DIV_4 == BSP_CFG_UCK_DIV
92 #elif BSP_CLOCKS_USB_CLOCK_DIV_5 == BSP_CFG_UCK_DIV
/bsp/renesas/ra2l1-cpk/ra/fsp/src/bsp/mcu/all/
A Dbsp_clocks.c76 #ifdef BSP_CFG_UCK_DIV
83 #define BSP_PRV_UCK_DIV (BSP_CFG_UCK_DIV)
88 #if BSP_CLOCKS_USB_CLOCK_DIV_3 == BSP_CFG_UCK_DIV
90 #elif BSP_CLOCKS_USB_CLOCK_DIV_4 == BSP_CFG_UCK_DIV
92 #elif BSP_CLOCKS_USB_CLOCK_DIV_5 == BSP_CFG_UCK_DIV
/bsp/renesas/ra6m3-ek/ra/fsp/src/bsp/mcu/all/
A Dbsp_clocks.c76 #ifdef BSP_CFG_UCK_DIV
83 #define BSP_PRV_UCK_DIV (BSP_CFG_UCK_DIV)
88 #if BSP_CLOCKS_USB_CLOCK_DIV_3 == BSP_CFG_UCK_DIV
90 #elif BSP_CLOCKS_USB_CLOCK_DIV_4 == BSP_CFG_UCK_DIV
92 #elif BSP_CLOCKS_USB_CLOCK_DIV_5 == BSP_CFG_UCK_DIV
/bsp/renesas/ra4e2-eco/ra/fsp/src/bsp/mcu/all/
A Dbsp_clocks.c130 #ifdef BSP_CFG_UCK_DIV
137 #define BSP_PRV_UCK_DIV (BSP_CFG_UCK_DIV)
141 #if BSP_CLOCKS_USB_CLOCK_DIV_1 == BSP_CFG_UCK_DIV
143 #elif BSP_CLOCKS_USB_CLOCK_DIV_2 == BSP_CFG_UCK_DIV
145 #elif BSP_CLOCKS_USB_CLOCK_DIV_3 == BSP_CFG_UCK_DIV
147 #elif BSP_CLOCKS_USB_CLOCK_DIV_4 == BSP_CFG_UCK_DIV
149 #elif BSP_CLOCKS_USB_CLOCK_DIV_5 == BSP_CFG_UCK_DIV
151 #elif BSP_CLOCKS_USB_CLOCK_DIV_6 == BSP_CFG_UCK_DIV
153 #elif BSP_CLOCKS_USB_CLOCK_DIV_8 == BSP_CFG_UCK_DIV
155 #elif BSP_CLOCKS_USB_CLOCK_DIV_10 == BSP_CFG_UCK_DIV
[all …]

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