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Searched refs:C1TIMER_INTCTL (Results 1 – 3 of 3) sorted by relevance

/bsp/raspberry-pi/raspi2/driver/
A Dbcm283x.h77 #define C1TIMER_INTCTL HWREG32(PER_BASE_40000000 + 0x44) /* Core1 timers Interrupt control */ macro
/bsp/raspberry-pi/raspi3-32/driver/
A Draspi.h289 #define C1TIMER_INTCTL HWREG32(PER_BASE_40000000 + 0x44) /* Core1 timers Interrupt control */ macro
/bsp/raspberry-pi/raspi3-64/driver/
A Draspi.h293 #define C1TIMER_INTCTL __REG32(PER_BASE_40000000 + 0x44) /* Core1 timers Interrupt control */ macro

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