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Searched refs:CACHE (Results 1 – 18 of 18) sorted by relevance

/bsp/airm2m/air105/libraries/HAL_Driver/Src/
A Dcore_flash.c90 CACHE_CleanAll(CACHE);
121 CACHE_CleanAll(CACHE);
128 CACHE_CleanAll(CACHE);
/bsp/synwit/libraries/SWM341_CSL/SWM341_StdPeriph_Driver/
A DSWM341_flash.c44 IAP_Cache_Reset((FMC->CACHE | FMC_CACHE_CCLR_Msk), 0x0B11FFAC); // Cache Clear in FLASH_Erase()
70 IAP_Cache_Reset((FMC->CACHE | FMC_CACHE_CCLR_Msk), 0x0B11FFAC); // Cache Clear in FLASH_Write()
/bsp/stm32/stm32f746-st-nucleo/
A DREADME_zh.md24 - MCU：STM32f746，主频 216MHz，1MB FLASH ，320KB RAM ，16K CACHE
/bsp/stm32/stm32f767-st-nucleo/
A DREADME_zh.md24 - MCU：STM32f767，主频 216MHz，2MB FLASH ，512KB RAM ，16K CACHE
/bsp/stm32/stm32f767-atk-apollo/
A DREADME.md25 - MCU：STM32f767，主频 216MHz，1MB FLASH ，512KB RAM，16K CACHE
/bsp/stm32/stm32f767-fire-challenger-v1/
A DREADME.md25 - MCU：STM32F767，主频 216MHz，1MB FLASH ，512KB RAM ，16K CACHE
/bsp/stm32/stm32h743-atk-apollo/
A DREADME.md129 1. 使用UART2 DMA模式时，HEAP的CACHE策略设置了WT模式，所以在使用rt_device_read读取数据之前必须调用用SCB_InvalidateDCache_by_Addr或者S…
/bsp/mm32f327x/Libraries/MM32F327x/Source/
A Dsystem_mm32f327x.c246 CACHE->CCR &= ~(0x3 << 3); in SetSysClock()
247 CACHE->CCR |= 1; in SetSysClock()
248 while((CACHE->SR & 0x3) != 2); in SetSysClock()
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_flash.h126 #define CACHE ((CACHE_TypeDef*) CACHE_BASE) macro
/bsp/nxp/imx/imxrt/imxrt1021-nxp-evk/board/
A DKconfig147 bool "Enable CACHE"
/bsp/nxp/imx/imxrt/imxrt1060-nxp-evk/board/
A DKconfig298 bool "Enable CACHE"
/bsp/essemi/es32vf2264/libraries/RV_CORE/Include/
A Dcore_rv32.h389 #define CACHE ((CACHE_Type *) CACHE_BASE ) /*!< cache configuration stru… macro
/bsp/thead-smart/drivers/
A Dcore_rv32.h430 #define CACHE ((CACHE_Type *) CACHE_BASE ) /*!< cache configuration stru… macro
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/arch/risc-v/t-head/Core/Include/
A Dcore_rv32.h435 #define CACHE ((CACHE_Type *)CACHE_BASE) /*!< cache configuration struct */ macro
/bsp/airm2m/air105/libraries/HAL_Driver/Inc/
A Dair105.h1046 #define CACHE ((CACHE_TypeDef *)CACHE_BASE) macro
/bsp/synwit/libraries/SWM320_CSL/CMSIS/DeviceSupport/
A DSWM320.h2710 __IO uint32_t CACHE; member
/bsp/synwit/libraries/SWM341_CSL/CMSIS/DeviceSupport/
A DSWM341.h2868 __IO uint32_t CACHE; member
/bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Device/MM32/MM32F3277/Include/
A Dmm32f3277g.h538 #define CACHE ((CACHE_Type*)CACHE_BASE) macro

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