| /bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/GD32VF103_standard_peripheral/Source/ |
| A D | gd32vf103_can.c | 52 if(CAN0 == can_periph){ in can_deinit()
255 CAN_FCTL(CAN0) |= CAN_FCTL_FLD; in can_filter_init()
257 CAN_FW(CAN0) &= ~(uint32_t)val; in can_filter_init()
275 CAN_FSCFG(CAN0) |= (uint32_t)val; in can_filter_init()
292 CAN_FMCFG(CAN0) |= (uint32_t)val; in can_filter_init()
307 CAN_FW(CAN0) |= (uint32_t)val; in can_filter_init()
311 CAN_FCTL(CAN0) &= ~CAN_FCTL_FLD; in can_filter_init()
325 CAN_FCTL(CAN0) |= CAN_FCTL_FLD; in can1_filter_start_bank()
330 CAN_FCTL(CAN0) &= ~CAN_FCTL_FLD; in can1_filter_start_bank()
344 if(CAN0 == can_periph){ in can_debug_freeze_enable()
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| /bsp/samd21/sam_d2x_asflib/sam0/drivers/can/ |
| A D | can.c | 86 if (hw == CAN0) { in _can_message_memory_init()
222 if (module_inst->hw == CAN0) { in _can_enable_peripheral_clock()
249 if (hw == CAN0) { in can_init()
279 if (hw == CAN0) { in can_set_baudrate()
299 if (hw == CAN0) { in can_fd_set_baudrate()
388 if (module_inst->hw == CAN0) { in can_disable_sleep_mode()
421 if (module_inst->hw == CAN0) { in can_set_rx_standard_filter()
435 if (module_inst->hw == CAN0) { in can_set_rx_extended_filter()
451 if (module_inst->hw == CAN0) { in can_get_rx_buffer_element()
465 if (module_inst->hw == CAN0) { in can_get_rx_fifo_0_element()
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| /bsp/gd32/arm/libraries/gd32_drivers/ |
| A D | drv_can.c | 68 .can_x = CAN0,
248 #ifdef CAN0 in _can_control()
249 if (CAN0 == can_dev->can_x) in _can_control()
271 #ifdef CAN0 in _can_control()
272 if (CAN0 == can_dev->can_x) in _can_control()
287 #ifdef CAN0 in _can_control()
288 if (CAN0 == can_dev->can_x) in _can_control()
316 #ifdef CAN0 in _can_control()
317 if (CAN0 == can_dev->can_x) in _can_control()
334 #ifdef CAN0 in _can_control()
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| /bsp/microchip/samc21/bsp/samc21/include/ |
| A D | samc21e15a.h | 402 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
455 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
457 #define CAN_INSTS { CAN0 } /**< \brief (CAN) Instances List */
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| A D | samc21e16a.h | 402 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
455 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
457 #define CAN_INSTS { CAN0 } /**< \brief (CAN) Instances List */
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| A D | samc21e17a.h | 402 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
455 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
457 #define CAN_INSTS { CAN0 } /**< \brief (CAN) Instances List */
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| A D | samc21e18a.h | 402 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
455 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
457 #define CAN_INSTS { CAN0 } /**< \brief (CAN) Instances List */
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| A D | samc21g15a.h | 414 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
470 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
473 #define CAN_INSTS { CAN0, CAN1 } /**< \brief (CAN) Instances List */
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| A D | samc21g16a.h | 414 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
470 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
473 #define CAN_INSTS { CAN0, CAN1 } /**< \brief (CAN) Instances List */
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| A D | samc21g17a.h | 414 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
470 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
473 #define CAN_INSTS { CAN0, CAN1 } /**< \brief (CAN) Instances List */
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| A D | samc21g18a.h | 414 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
470 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
473 #define CAN_INSTS { CAN0, CAN1 } /**< \brief (CAN) Instances List */
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| A D | samc21j15a.h | 414 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
470 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
473 #define CAN_INSTS { CAN0, CAN1 } /**< \brief (CAN) Instances List */
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| A D | samc21j16a.h | 414 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
470 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
473 #define CAN_INSTS { CAN0, CAN1 } /**< \brief (CAN) Instances List */
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| A D | samc21j17a.h | 414 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
470 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
473 #define CAN_INSTS { CAN0, CAN1 } /**< \brief (CAN) Instances List */
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| A D | samc21j17au.h | 414 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
470 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
473 #define CAN_INSTS { CAN0, CAN1 } /**< \brief (CAN) Instances List */
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| A D | samc21j18a.h | 414 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
470 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
473 #define CAN_INSTS { CAN0, CAN1 } /**< \brief (CAN) Instances List */
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| A D | samc21j18au.h | 414 #define CAN0 (0x42001C00) /**< \brief (CAN0) APB Base Address */ macro
470 #define CAN0 ((Can *)0x42001C00UL) /**< \brief (CAN0) APB Base Address */ macro
473 #define CAN_INSTS { CAN0, CAN1 } /**< \brief (CAN) Instances List */
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| /bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/HT32F5xxxx_Driver/inc/ |
| A D | ht32f5xxxx_rstcu.h | 150 unsigned long CAN0 :1; // Bit 30 member
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| /bsp/microchip/samc21/bsp/hpl/can/ |
| A D | hpl_can.c | 92 if (hw == CAN0) { in _can_async_init()
193 if (dev->hw == CAN0) { in _can_async_read()
245 if (dev->hw == CAN0) { in _can_async_write()
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| /bsp/loongson/ls1cdev/drivers/ |
| A D | drv_can.c | 244 if (pbxcan == CAN0) in configure()
412 CANx = CAN0; in ls1c_can0_irqhandler()
441 .reg = CAN0,
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| /bsp/microchip/same54/bsp/hpl/can/ |
| A D | hpl_can.c | 92 if (hw == CAN0) { in _can_async_init()
193 if (dev->hw == CAN0) { in _can_async_read()
245 if (dev->hw == CAN0) { in _can_async_write()
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| /bsp/microchip/samc21/board/ |
| A D | Kconfig | 29 bool "Enable CAN0"
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| /bsp/microchip/samc21/bsp/ |
| A D | driver_init.c | 156 can_async_init(&CAN_0, CAN0); in CAN_0_init()
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| /bsp/synwit/libraries/SWM341_CSL/SWM341_StdPeriph_Driver/ |
| A D | SWM341_can.c | 39 case ((uint32_t)CAN0): in CAN_Init()
71 case ((uint32_t)CAN0): in CAN_Init()
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| /bsp/microchip/same70/board/ |
| A D | Kconfig | 27 bool "Enable CAN0"
|