Searched refs:CCI_BASE (Results 1 – 12 of 12) sorted by relevance
| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/config/bl602/ |
| A D | bl602_memorymap.h | 49 #define CCI_BASE ((uint32_t)0x40008000) macro
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/config/bl702/ |
| A D | bl702_memorymap.h | 60 #define CCI_BASE ((uint32_t)0x40008000) macro
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/config/bl616/ |
| A D | bl616_memorymap.h | 70 #define CCI_BASE ((uint32_t)0x20008000) macro
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/config/bl808/ |
| A D | bl808_memorymap.h | 73 #define CCI_BASE ((uint32_t)0x20008000) macro
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl602/std/include/hardware/ |
| A D | bl602.h | 160 #define CCI_BASE ((uint32_t)0x40008000) macro
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl702/std/include/hardware/ |
| A D | bl702.h | 181 #define CCI_BASE ((uint32_t)0x40008000) macro
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl616/std/include/hardware/ |
| A D | bl616.h | 204 #define CCI_BASE ((uint32_t)0x20008000) macro
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl616/std/src/ |
| A D | bl616_clock.c | 99 tmpVal = BL_GET_REG_BITS_VAL(BL_RD_REG(CCI_BASE, CCI_AUDIO_PLL_CFG6), CCI_AUPLL_SDMIN); in Clock_Get_AUPLL_Output()
181 tmpVal = BL_GET_REG_BITS_VAL(BL_RD_REG(CCI_BASE, CCI_AUDIO_PLL_CFG1), CCI_AUPLL_POSTDIV); in Clock_Get_Audio_PLL_Output()
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| A D | bl616_glb.c | 686 REG_PLL_BASE_ADDRESS = CCI_BASE + CCI_AUDIO_PLL_CFG0_OFFSET; in GLB_Power_Off_AUPLL()
716 REG_PLL_BASE_ADDRESS = CCI_BASE + CCI_AUDIO_PLL_CFG0_OFFSET; in GLB_AUPLL_Ref_Clk_Sel()
740 REG_PLL_BASE_ADDRESS = CCI_BASE + CCI_AUDIO_PLL_CFG0_OFFSET; in GLB_Power_On_AUPLL()
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/src/ |
| A D | bl808_clock.c | 147 tmpVal = BL_GET_REG_BITS_VAL(BL_RD_REG(CCI_BASE, CCI_CPU_PLL_CFG6), CCI_CPUPLL_SDMIN); in Clock_Get_CPU_PLL_Output()
206 tmpVal = BL_GET_REG_BITS_VAL(BL_RD_REG(CCI_BASE, CCI_AUDIO_PLL_CFG6), CCI_AUPLL_SDMIN); in Clock_Get_AUPLL_Output()
282 tmpVal = BL_GET_REG_BITS_VAL(BL_RD_REG(CCI_BASE, CCI_AUDIO_PLL_CFG1), CCI_AUPLL_POSTDIV); in Clock_Get_Audio_PLL_Output()
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| A D | bl808_glb.c | 1090 REG_PLL_BASE_ADDRESS = CCI_BASE + CCI_AUDIO_PLL_CFG0_OFFSET; in GLB_Power_Off_WAC_PLL()
1093 REG_PLL_BASE_ADDRESS = CCI_BASE + CCI_CPU_PLL_CFG0_OFFSET; in GLB_Power_Off_WAC_PLL()
1096 REG_PLL_BASE_ADDRESS = CCI_BASE + CCI_AUDIO_PLL_CFG0_OFFSET; in GLB_Power_Off_WAC_PLL()
1135 REG_PLL_BASE_ADDRESS = CCI_BASE + CCI_AUDIO_PLL_CFG0_OFFSET; in GLB_WAC_PLL_Ref_Clk_Sel()
1138 REG_PLL_BASE_ADDRESS = CCI_BASE + CCI_CPU_PLL_CFG0_OFFSET; in GLB_WAC_PLL_Ref_Clk_Sel()
1141 REG_PLL_BASE_ADDRESS = CCI_BASE + CCI_AUDIO_PLL_CFG0_OFFSET; in GLB_WAC_PLL_Ref_Clk_Sel()
1181 REG_PLL_BASE_ADDRESS = CCI_BASE + CCI_AUDIO_PLL_CFG0_OFFSET; in GLB_Power_On_WAC_PLL()
1184 REG_PLL_BASE_ADDRESS = CCI_BASE + CCI_CPU_PLL_CFG0_OFFSET; in GLB_Power_On_WAC_PLL()
1187 REG_PLL_BASE_ADDRESS = CCI_BASE + CCI_AUDIO_PLL_CFG0_OFFSET; in GLB_Power_On_WAC_PLL()
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| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/include/hardware/ |
| A D | bl808.h | 417 #define CCI_BASE ((uint32_t)0x20008000) macro
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