Home
last modified time | relevance | path

Searched refs:CFG1 (Results 1 – 25 of 34) sorted by relevance

12

/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_pwmv2_drv.h544 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_FAULT_MODE_MASK) | PWMV2_PWM_CFG1_F… in pwmv2_set_fault_mode()
556 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_FAULT_REC_TIME_MASK) | PWMV2_PWM_CF… in pwmv2_set_fault_recovery_time()
623 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_PWM_LOGIC_MASK) | PWMV2_PWM_CFG1_PW… in pwmv2_set_four_cmp_logic()
635 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_FORCE_TIME_MASK) | PWMV2_PWM_CFG1_F… in pwmv2_set_force_update_time()
647 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_FORCE_TRIG_SEL_MASK) | PWMV2_PWM_CF… in pwmv2_trig_force_mode_select_trigmux_index()
659 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_FORCE_ACT_SEL_MASK) | PWMV2_PWM_CFG… in pwmv2_trig_force_hardware_or_software_select_trigmux_index()
671 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_PWM_FORCE_SEL_MASK) | PWMV2_PWM_CFG… in pwmv2_select_force_trigmux_index()
683 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_FAULT_REC_SEL_MASK) | PWMV2_PWM_CFG… in pwmv2_select_recovery_fault_trigmux_index()
1417 …pwm_x->CNT[counter].CFG1 = (pwm_x->CNT[counter].CFG1 & ~PWMV2_CNT_CFG1_CNT_LIM_UP_MASK) | PWMV2_CN… in pwmv2_counter_select_up_limit_from_shadow_value()
1452 …pwm_x->CNT[counter].CFG1 = (pwm_x->CNT[counter].CFG1 & ~PWMV2_CNT_CFG1_CNT_LIM_LO_MASK) | PWMV2_CN… in pwmv2_counter_select_low_limit_from_shadow_value()
[all …]
A Dhpm_opamp_drv.h191 opamp->CFG[preset_chn].CFG1 |= OPAMP_CFG_CFG1_EN_LV_MASK; in opamp_preset_opamp_enable()
212 opamp->CFG[preset_chn].CFG1 &= ~OPAMP_CFG_CFG1_EN_LV_MASK; in opamp_preset_opamp_disable()
325 …opamp->CFG[preset_chn].CFG1 = (opamp->CFG[preset_chn].CFG1 & (~OPAMP_CFG_CFG1_GAIN_SEL_MASK)) | OP… in opamp_preset_gain_select()
346 opamp->CFG[preset_chn].CFG1 |= OPAMP_CFG_CFG1_VBYPASS_LV_MASK; in opamp_preset_disconnect_vssa()
367 opamp->CFG[preset_chn].CFG1 &= ~OPAMP_CFG_CFG1_VBYPASS_LV_MASK; in opamp_preset_connect_vssa()
500 opamp->CFG[preset_chn].CFG1 |= OPAMP_CFG_CFG1_HW_TRIG_EN_MASK; in opamp_preset_enable_hw_trig()
511 opamp->CFG[preset_chn].CFG1 &= ~OPAMP_CFG_CFG1_HW_TRIG_EN_MASK; in opamp_preset_disable_hw_trig()
534 …opamp->CFG[preset_chn].CFG1 = (opamp->CFG[preset_chn].CFG1 & (~OPAMP_CFG_CFG1_MODE_MASK)) | OPAMP_… in opamp_preset_mode_set()
A Dhpm_pllctl_drv.h110 ptr->PLL[pll].CFG1 = (ptr->PLL[pll].CFG1 & in pllctl_pll_powerdown()
131 cfg = ptr->PLL[pll].CFG1; in pllctl_pll_poweron()
137 ptr->PLL[pll].CFG1 &= ~PLLCTL_PLL_CFG1_PLLCTRL_HW_EN_MASK; in pllctl_pll_poweron()
140 ptr->PLL[pll].CFG1 &= ~PLLCTL_PLL_CFG1_PLLPD_SW_MASK; in pllctl_pll_poweron()
145 ptr->PLL[pll].CFG1 |= PLLCTL_PLL_CFG1_PLLCTRL_HW_EN_MASK; in pllctl_pll_poweron()
169 if (!(ptr->PLL[pll].CFG1 & PLLCTL_PLL_CFG1_PLLPD_SW_MASK)) { in pllctl_pll_ss_enable()
/bsp/apm32/libraries/APM32F0xx_Library/APM32F0xx_StdPeriphDriver/src/
A Dapm32f0xx_syscfg.c73 SYSCFG->CFG1 &= (uint32_t) SYSCFG_CFG1_MEMMODE; in SYSCFG_Reset()
121 SYSCFG->CFG1 |= (uint32_t)channel; in SYSCFG_EnableDMAChannelRemap()
148 SYSCFG->CFG1 &= (uint32_t)~channel; in SYSCFG_DisableDMAChannelRemap()
169 SYSCFG->CFG1 |= (uint32_t)pin; in SYSCFG_EnableI2CFastModePlus()
190 SYSCFG->CFG1 &= (uint32_t)~pin; in SYSCFG_DisableI2CFastModePlus()
208 SYSCFG->CFG1 &= ~(0x000000C0); in SYSCFG_SelectIRDAEnv()
209 SYSCFG->CFG1 |= (IRDAEnv); in SYSCFG_SelectIRDAEnv()
A Dapm32f0xx_rcm.c75 RCM->CFG1 &= (uint32_t)0x08FFB80C; in RCM_Reset()
78 RCM->CFG1 &= (uint32_t)0xFFC0FFFF; in RCM_Reset()
/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_dac_drv.c42 ptr->CFG1 &= ~DAC_CFG1_ANA_DIV_CFG_MASK; in dac_init()
43 ptr->CFG1 |= DAC_CFG1_ANA_DIV_CFG_SET(config->ana_div); in dac_init()
47 ptr->CFG1 |= DAC_CFG1_ANA_CLK_EN_MASK; in dac_init()
187 ptr->CFG1 &= ~DAC_CFG1_DIV_CFG_MASK; in dac_set_output_frequency()
188 …ptr->CFG1 |= DAC_CFG1_DIV_CFG_SET(dac_input_freq % dac_output_freq ? (dac_input_freq / dac_output… in dac_set_output_frequency()
A Dhpm_pwmv2_drv.c33 pwm_x->PWM[i].CFG1 = 0; in pwmv2_deinit()
38 pwm_x->CAL[i].CFG1 = 0; in pwmv2_deinit()
76 pwm_x->PWM[index].CFG1 = PWMV2_PWM_CFG1_HIGHZ_EN_N_SET(config->enable_output) | in pwmv2_config_pwm()
127 pwm_x->CAL[cal_index].CFG1 = PWMV2_CAL_CFG1_CAL_T_INDEX_SET(cal->counter_index) | in pwmv2_setup_cmp_calculate()
A Dhpm_gwc_drv.c42 ptr->CHANNEL[ch_index].CFG1 = GWC_CHANNEL_CFG1_END_ROW_SET(cfg->end_row) | in gwc_ch_init()
A Dhpm_ppi_drv.c44 ppi->CS[index].CFG1 = tmp; in ppi_config_cs_pin()
A Dhpm_opamp_drv.c116 opamp->CFG[preset_chn].CFG1 = 0; in opamp_set_preset_cfg()
A Dhpm_pllctl_drv.c226 if (ptr->PLL[pll].CFG1 & PLLCTL_PLL_CFG1_PLLPD_SW_MASK) { in pllctl_get_pll_freq_in_hz()
/bsp/apm32/libraries/APM32F0xx_Library/Device/Geehy/APM32F0xx/Source/
A Dsystem_apm32f0xx.c116 RCM->CFG1 &= (uint32_t)0x08FFB80CU; in SystemInit()
122 RCM->CFG1 &= (uint32_t)0xFFC0FFFFU; in SystemInit()
124 RCM->CFG1 &= (uint32_t)0xFFFFFFF0U; in SystemInit()
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6800/ip/
A Dhpm_gwc_regs.h19 __RW uint32_t CFG1; /* 0x14: config reg 1 */ member
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM5300/ip/
A Dhpm_opamp_regs.h19 __RW uint32_t CFG1; /* 0x14: */ member
A Dhpm_dac_regs.h14 __RW uint32_t CFG1; /* 0x4: */ member
/bsp/frdm-k64f/device/MK64F12/
A Dfsl_adc16.c97 base->CFG1 = tmp32; in ADC16_Init()
/bsp/stm32/stm32h750-fk750m1-vbt6/board/port/lcd/
A Ddrv_lcd_spi_ext.c65 CLEAR_BIT(hspi->Instance->CFG1, SPI_CFG1_TXDMAEN | SPI_CFG1_RXDMAEN); in LCD_SPI_CloseTransfer()
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6700/ip/
A Dhpm_pllctl_regs.h17 __RW uint32_t CFG1; /* 0x84: PLLx config1 */ member
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6E00/ip/
A Dhpm_pwmv2_regs.h21 __RW uint32_t CFG1; /* 0x104: */ member
63 __RW uint32_t CFG1; /* 0x504: */ member
71 __RW uint32_t CFG1; /* 0x604: */ member
A Dhpm_ppi_regs.h24 __RW uint32_t CFG1; /* 0x44: cfg1 */ member
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6200/ip/
A Dhpm_dac_regs.h14 __RW uint32_t CFG1; /* 0x4: */ member
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6300/ip/
A Dhpm_dac_regs.h14 __RW uint32_t CFG1; /* 0x4: */ member
/bsp/nxp/imx/imx6ull-smart/drivers/
A Ddrv_eth.c288 uid[1] = ocotp_base->CFG1; in rt_imx6ul_eth_control()
/bsp/apm32/libraries/APM32F0xx_Library/Device/Geehy/APM32F0xx/Include/
A Dapm32f0xx.h445 __IOM uint32_t CFG1; member
3367 __IOM uint32_t CFG1; member
4219 __IOM uint32_t CFG1; member
/bsp/smartfusion2/CMSIS/
A Dm2sxxx.h612 __IO uint32_t CFG1; member

Completed in 106 milliseconds

12