Searched refs:CFG1_PLL1MF (Results 1 – 1 of 1) sorted by relevance

/bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/GD32VF103_standard_peripheral/Include/
A D	gd32vf103_rcu.h	578 #define CFG1_PLL1MF(regval) (BITS(8,11) & ((uint32_t)(regval) << 8)) macro 579 #define RCU_PLL1_MUL8 CFG1_PLL1MF(6) /*!< PLL1 source clock … 580 #define RCU_PLL1_MUL9 CFG1_PLL1MF(7) /*!< PLL1 source clock … 581 #define RCU_PLL1_MUL10 CFG1_PLL1MF(8) /*!< PLL1 source clock … 582 #define RCU_PLL1_MUL11 CFG1_PLL1MF(9) /*!< PLL1 source clock … 583 #define RCU_PLL1_MUL12 CFG1_PLL1MF(10) /*!< PLL1 source clock … 584 #define RCU_PLL1_MUL13 CFG1_PLL1MF(11) /*!< PLL1 source clock … 585 #define RCU_PLL1_MUL14 CFG1_PLL1MF(12) /*!< PLL1 source clock … 586 #define RCU_PLL1_MUL15 CFG1_PLL1MF(13) /*!< PLL1 source clock … 587 #define RCU_PLL1_MUL16 CFG1_PLL1MF(14) /*!< PLL1 source clock … [all …]

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