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Searched refs:CFGR0_PPRE1_Set_Mask (Results 1 – 3 of 3) sorted by relevance

/bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32v10x_rcc.c36 #define CFGR0_PPRE1_Set_Mask ((uint32_t)0x00000700) macro
582 tmp = RCC->CFGR0 & CFGR0_PPRE1_Set_Mask; in RCC_GetClocksFreq()
/bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32f10x_rcc.c71 #define CFGR0_PPRE1_Set_Mask ((uint32_t)0x00000700) macro
522 tmp = RCC->CFGR0 & CFGR0_PPRE1_Set_Mask; in RCC_GetClocksFreq()
/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32f20x_rcc.c42 #define CFGR0_PPRE1_Set_Mask ((uint32_t)0x00000700) macro
582 tmp = RCC->CFGR0 & CFGR0_PPRE1_Set_Mask; in RCC_GetClocksFreq()

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