| /bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/ |
| A D | stm32l1xx_ll_rcc.h | 1296 SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC); in LL_RCC_ClearFlag_LSIRDY() 1306 SET_BIT(RCC->CIR, RCC_CIR_LSERDYC); in LL_RCC_ClearFlag_LSERDY() 1316 SET_BIT(RCC->CIR, RCC_CIR_MSIRDYC); in LL_RCC_ClearFlag_MSIRDY() 1326 SET_BIT(RCC->CIR, RCC_CIR_HSIRDYC); in LL_RCC_ClearFlag_HSIRDY() 1336 SET_BIT(RCC->CIR, RCC_CIR_HSERDYC); in LL_RCC_ClearFlag_HSERDY() 1346 SET_BIT(RCC->CIR, RCC_CIR_PLLRDYC); in LL_RCC_ClearFlag_PLLRDY() 1356 SET_BIT(RCC->CIR, RCC_CIR_CSSC); in LL_RCC_ClearFlag_HSECSS() 1367 SET_BIT(RCC->CIR, RCC_CIR_LSECSSC); in LL_RCC_ClearFlag_LSECSS() 1548 SET_BIT(RCC->CIR, RCC_CIR_LSIRDYIE); in LL_RCC_EnableIT_LSIRDY() 1558 SET_BIT(RCC->CIR, RCC_CIR_LSERDYIE); in LL_RCC_EnableIT_LSERDY() [all …]
|
| A D | stm32l1xx_hal_rcc.h | 1797 #define __HAL_RCC_GET_IT(__INTERRUPT__) ((RCC->CIR & (__INTERRUPT__)) == (__INTERRUPT__))
|
| /bsp/allwinner/libraries/sunxi-hal/hal/source/cir/ |
| A D | Kconfig | 1 menu "CIR Devices" 4 bool "enable CIR driver" 7 menu "CIR option features" 10 bool "support CIR debug" 15 bool "CIR test case" 20 bool "CIR TEST CASE"
|
| /bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/src/ |
| A D | HAL_rcc.c | 190 RCC->CIR = 0x00000000; in RCC_DeInit() 596 RCC->CIR &= ~((uint32_t)0x1f)<<8; in RCC_ITConfig() 597 RCC->CIR |= ((uint32_t)RCC_IT)<<8; in RCC_ITConfig() 602 RCC->CIR &= ~((uint32_t)RCC_IT<<8); in RCC_ITConfig() 1099 if ((RCC->CIR & RCC_IT) != (uint32_t)RESET) in RCC_GetITStatus() 1130 RCC->CIR |= (uint32_t)RCC_IT<<16; in RCC_ClearITPendingBit()
|
| /bsp/mm32f103x/Libraries/MM32F103/HAL_lib/src/ |
| A D | HAL_rcc.c | 190 RCC->CIR = 0x00000000; in RCC_DeInit() 597 RCC->CIR &= ~((uint32_t)0x1f) << 8; in RCC_ITConfig() 598 RCC->CIR |= ((uint32_t)RCC_IT) << 8; in RCC_ITConfig() 603 RCC->CIR &= ~((uint32_t)RCC_IT << 8); in RCC_ITConfig() 1103 if ((RCC->CIR & RCC_IT) != (uint32_t)RESET) in RCC_GetITStatus() 1134 RCC->CIR |= (uint32_t)RCC_IT << 16; in RCC_ClearITPendingBit()
|
| /bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Src/ |
| A D | stm32l1xx_ll_rcc.c | 119 LL_RCC_WriteReg(CIR, 0x00000000U); in LL_RCC_DeInit() 129 LL_RCC_WriteReg(CIR, vl_mask); in LL_RCC_DeInit()
|
| A D | stm32l1xx_hal_rcc.c | 295 CLEAR_REG(RCC->CIR); in HAL_RCC_DeInit() 299 …WRITE_REG(RCC->CIR, RCC_CIR_LSIRDYC | RCC_CIR_LSERDYC | RCC_CIR_HSIRDYC | RCC_CIR_HSERDYC | RCC_CI… in HAL_RCC_DeInit() 301 …WRITE_REG(RCC->CIR, RCC_CIR_LSIRDYC | RCC_CIR_LSERDYC | RCC_CIR_HSIRDYC | RCC_CIR_HSERDYC | RCC_CI… in HAL_RCC_DeInit()
|
| /bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/ |
| A D | HAL_rcc.c | 204 RCC->CIR &= 0xFF62E262; in RCC_DeInit() 619 RCC->CIR |= ((uint32_t)RCC_IT)<<8; in RCC_ITConfig() 625 RCC->CIR &= ~((uint32_t)RCC_IT<<8); in RCC_ITConfig() 1006 if ((RCC->CIR & RCC_IT) != (uint32_t)RESET) in RCC_GetITStatus() 1036 RCC->CIR |= (uint32_t)RCC_IT<<16; in RCC_ClearITPendingBit()
|
| /bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/ |
| A D | hal_rcc.c | 54 CLEAR_REG(RCC->CIR); in RCC_DeInit() 669 …(state) ? SET_BIT(RCC->CIR, it << RCC_CIR_LSIRDYIE_Pos) : CLEAR_BIT(RCC->CIR, it << RCC_CIR_LSIRDY… in RCC_ITConfig() 686 return (ITStatus)READ_BIT(RCC->CIR, (it << RCC_CIR_LSIRDYF_Pos)); in RCC_GetITStatus() 703 SET_BIT(RCC->CIR, (it << RCC_CIR_LSIRDYC_Pos)); in RCC_ClearITPendingBit()
|
| /bsp/tkm32F499/Libraries/Hal_lib/src/ |
| A D | HAL_rcc.c | 213 RCC->CIR = 0x00000000; in RCC_DeInit() 723 RCC->CIR |= ((uint32_t)RCC_IT)<<8; in RCC_ITConfig() 729 RCC->CIR &= ~((uint32_t)RCC_IT<<8); in RCC_ITConfig() 1259 if ((RCC->CIR & RCC_IT) != (uint32_t)RESET) in RCC_GetITStatus() 1290 RCC->CIR |= (uint32_t)RCC_IT<<16; in RCC_ClearITPendingBit()
|
| /bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Source/ |
| A D | system_hk32f0xx.c | 166 RCC->CIR = 0x00000000; in SystemInit()
|
| /bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/ |
| A D | system_air32f10x.c | 239 RCC->CIR = 0x00FF0000; in SystemInit() 245 RCC->CIR = 0x009F0000; in SystemInit() 251 RCC->CIR = 0x009F0000; in SystemInit()
|
| A D | air32f10x_rcc.c | 170 RCC->CIR = 0x009F0000; in RCC_DeInit() 1046 if ((RCC->CIR & RCC_IT) != (uint32_t)RESET) in RCC_GetITStatus()
|
| /bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Src/ |
| A D | ft32f0xx_rcc.c | 80 RCC->CIR = 0x00000000; in RCC_DeInit() 1457 if ((RCC->CIR & RCC_IT) != (uint32_t)RESET) in RCC_GetITStatus()
|
| /bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/src/ |
| A D | hk32f0xx_rcc.c | 151 RCC->CIR = 0x00000000; in RCC_DeInit() 1557 if ((RCC->CIR & RCC_IT) != (uint32_t)RESET) in RCC_GetITStatus()
|
| /bsp/mm32l07x/Libraries/MM32L0xx/Source/ |
| A D | system_MM32L0xx.c | 194 RCC->CIR &= 0xFF62E262; in SystemInit()
|
| /bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/source/ |
| A D | system_ft32f0xx.c | 154 RCC->CIR = 0x00000000; in SystemInit()
|
| /bsp/mm32f327x/Libraries/MM32F327x/Include/ |
| A D | reg_rcc.h | 59 …__IO u32 CIR; ///< Clock Interrupt R… member
|
| /bsp/mm32l3xx/Libraries/MM32L3xx/Source/ |
| A D | system_MM32L3xx.c | 204 RCC->CIR = 0x009F0000; in SystemInit()
|
| /bsp/mm32f103x/Libraries/MM32F103/Source/ |
| A D | system_MM32F103.c | 204 RCC->CIR = 0x009F0000; in SystemInit()
|
| /bsp/mm32f327x/Libraries/MM32F327x/Source/ |
| A D | system_mm32f327x.c | 187 RCC->CIR = 0x009F0000; in SystemInit()
|
| /bsp/acm32/acm32f0x0-nucleo/libraries/Device/ |
| A D | ACM32F0x0.h | 376 __IO uint32_t CIR; // 0x18 member
|
| /bsp/acm32/acm32f4xx-nucleo/libraries/Device/ |
| A D | ACM32F4.h | 422 __IO uint32_t CIR; member
|
| /bsp/renesas/rzn2l_rsk/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/ |
| A D | R9A07G084.h | 15308 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15365 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15422 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15479 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15536 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15593 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15650 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15707 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 17173 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 17230 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member [all …]
|
| /bsp/renesas/rzn2l_etherkit/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/ |
| A D | R9A07G084.h | 15308 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15365 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15422 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15479 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15536 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15593 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15650 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 15707 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 17173 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member 17230 …__IOM uint32_t CIR : 17; /*!< [16..0] CIR (Committed Information Rate) … member [all …]
|