| /bsp/nuvoton/libraries/ma35/rtt_port/ |
| A D | drv_sys.c | 244 CLK->PWRCTL |= (CLK_PWRCTL_HXTEN_Msk | CLK_PWRCTL_HIRCEN_Msk); in nu_clock_raise()
245 if (CLK->STATUS & CLK_STATUS_HXTSTB_Msk) // Check Ready in nu_clock_raise()
249 else if (CLK->STATUS & CLK_STATUS_HIRCSTB_Msk) // Check Ready in nu_clock_raise()
267 CLK->CLKSEL0 = (CLK->CLKSEL0 & (~CLK_CLKSEL0_CA35CKSEL_Msk)) | CLK_CLKSEL0_CA35CKSEL_DDRPLL; in nu_clock_raise()
286 CLK->CLKSEL0 = (CLK->CLKSEL0 & (~CLK_CLKSEL0_CA35CKSEL_Msk)) | CLK_CLKSEL0_CA35CKSEL_CAPLL; in nu_clock_raise()
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| A D | drv_ssmcc.c | 21 CLK->APBCLK2 |= CLK_APBCLK2_SSMCCEN_Msk; in nu_ssmcc_init()
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| A D | drv_sspcc.c | 24 CLK->APBCLK2 |= CLK_APBCLK2_SSPCCEN_Msk; in nu_sspcc_init()
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| /bsp/Vango/v85xxp/Libraries/VangoV85xxP_standard_peripheral/Source/ |
| A D | lib_iso7816.c | 40 ISO7816x->CLK = ISO7816_CLK_RSTValue; in ISO7816_DeInit()
182 tmp = ISO7816x->CLK; in ISO7816_CLKDIVConfig()
185 ISO7816x->CLK = tmp; in ISO7816_CLKDIVConfig()
204 ISO7816x->CLK |= ISO7816_CLK_CLKEN; in ISO7816_CLKOutputCmd()
208 ISO7816x->CLK &= ~ISO7816_CLK_CLKEN; in ISO7816_CLKOutputCmd()
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| /bsp/Vango/v85xx/Libraries/VangoV85xx_standard_peripheral/Source/ |
| A D | lib_iso7816.c | 110 ISO7816x->CLK = ISO7816_CLK_RSTValue; in ISO7816_DeInit()
172 tmp = ISO7816x->CLK; in ISO7816_CLKDIVConfig()
175 ISO7816x->CLK = tmp; in ISO7816_CLKDIVConfig()
194 ISO7816x->CLK |= ISO7816_CLK_CLKEN; in ISO7816_CLKOutputCmd()
198 ISO7816x->CLK &= ~ISO7816_CLK_CLKEN; in ISO7816_CLKOutputCmd()
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| /bsp/nuvoton/numaker-m032ki/board/NuClockConfig/ |
| A D | nutool_modclkcfg.c | 428 CLK->PLLCTL = (CLK->PLLCTL & ~(0x000FFFFFul)) | 0x0008C02Eul; in nutool_modclkcfg_init_base()
438 CLK->PCLKDIV = (CLK_PCLKDIV_APB0DIV_DIV1 | CLK_PCLKDIV_APB1DIV_DIV1); in nutool_modclkcfg_init_base()
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| /bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/HT32F5xxxx_Driver/inc/ |
| A D | ht32f5xxxx_sci.h | 183 #define IS_SCI_CLK(CLK) ((CLK == SCI_CLK_HIGH) || \ argument
184 (CLK == SCI_CLK_LOW))
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| /bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/HT32F1xxxx_Driver/inc/ |
| A D | ht32f1xxxx_sci.h | 183 #define IS_SCI_CLK(CLK) ((CLK == SCI_CLK_HIGH) || \ argument
184 (CLK == SCI_CLK_LOW))
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| /bsp/nuvoton/libraries/m480/rtt_port/ |
| A D | drv_bpwm.c | 136 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM0SEL_Msk; in nu_bpwm_clksr()
140 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM1SEL_Msk; in nu_bpwm_clksr()
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| A D | drv_clk.c | 268 CLK->IOPDCTL = 1; in rt_hw_pm_init()
271 CLK->PMUSTS = CLK_PMUSTS_CLRWK_Msk; in rt_hw_pm_init()
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| A D | drv_epwm.c | 140 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM0SEL_Msk; in nu_epwm_clksr()
144 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM1SEL_Msk; in nu_epwm_clksr()
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| /bsp/nuvoton/libraries/m031/rtt_port/ |
| A D | drv_bpwm.c | 136 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM0SEL_Msk; in nu_bpwm_clksr()
140 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM1SEL_Msk; in nu_bpwm_clksr()
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| A D | drv_pwm.c | 138 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_PWM0SEL_Msk; in nu_pwm_clksr()
142 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_PWM1SEL_Msk; in nu_pwm_clksr()
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| /bsp/nuvoton/libraries/m2354/rtt_port/ |
| A D | drv_bpwm.c | 136 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM0SEL_Msk; in nu_bpwm_clksr()
140 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM1SEL_Msk; in nu_bpwm_clksr()
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| A D | drv_clk.c | 271 CLK->IOPDCTL = 1; in rt_hw_pm_init()
274 CLK->PMUSTS = CLK_PMUSTS_CLRWK_Msk; in rt_hw_pm_init()
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| A D | drv_epwm.c | 140 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM0SEL_Msk; in nu_epwm_clksr()
144 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM1SEL_Msk; in nu_epwm_clksr()
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| /bsp/tm4c123bsp/board/ |
| A D | Kconfig | 201 prompt "I2C0 CLK frequency"
217 prompt "I2C1 CLK frequency"
233 prompt "I2C2 CLK frequency"
249 prompt "I2C3 CLK frequency"
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| /bsp/nuvoton/numaker-pfm-m487/board/NuClockConfig/ |
| A D | nutool_modclkcfg.c | 932 CLK->PLLCTL = (CLK->PLLCTL & ~(0x000FFFFFul)) | 0x0000421Eul; in nutool_modclkcfg_init_base()
942 CLK->PCLKDIV = (CLK_PCLKDIV_PCLK0DIV2 | CLK_PCLKDIV_PCLK1DIV2); in nutool_modclkcfg_init_base()
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| /bsp/nuvoton/numaker-iot-m487/board/NuClockConfig/ |
| A D | nutool_modclkcfg.c | 932 CLK->PLLCTL = (CLK->PLLCTL & ~(0x000FFFFFul)) | 0x0000421Eul; in nutool_modclkcfg_init_base()
942 CLK->PCLKDIV = (CLK_PCLKDIV_PCLK0DIV2 | CLK_PCLKDIV_PCLK1DIV2); in nutool_modclkcfg_init_base()
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| /bsp/rockchip/common/rk_hal/lib/CMSIS/Device/RK2108/Include/ |
| A D | rk2108.h | 11546 #define CLK(mux, div) \ macro
11555 PCLK_DSP = CLK(0U, PCLK_DSP_DIV),
11557 PCLK_SHRM = CLK(0U, PCLK_SHRM_DIV),
11560 CLK_UART0 = CLK(SCLK_UART0_SEL, 0U),
11563 CLK_UART1 = CLK(SCLK_UART1_SEL, 0U),
11567 CLK_I2C0 = CLK(0U, CLK_I2C0_DIV),
11568 CLK_I2C1 = CLK(0U, CLK_I2C1_DIV),
11569 CLK_I2C2 = CLK(0U, CLK_I2C2_DIV),
11588 CLK_SPI1 = CLK(0U, CLK_SPI1_DIV),
11590 CLK_SPI2 = CLK(0U, CLK_SPI2_DIV),
[all …]
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| /bsp/nuvoton/libraries/m031/ |
| A D | README.md | 10 | CLK | RT_Device_Class_PM | ***pm*** |
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| /bsp/nuvoton/numaker-m467hj/board/ |
| A D | nutool_modclkcfg.c | 1117 CLK->PCLKDIV = (CLK_PCLKDIV_PCLK0DIV2 | CLK_PCLKDIV_PCLK1DIV2); in nutool_modclkcfg_init_base()
1120 …CLK->AHBCLK0 |= CLK_AHBCLK0_GPACKEN_Msk | CLK_AHBCLK0_GPBCKEN_Msk | CLK_AHBCLK0_GPCCKEN_Msk | CLK_… in nutool_modclkcfg_init_base()
1122 CLK->AHBCLK1 |= CLK_AHBCLK1_GPICKEN_Msk | CLK_AHBCLK1_GPJCKEN_Msk; in nutool_modclkcfg_init_base()
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| /bsp/nuvoton/numaker-iot-m467/board/ |
| A D | nutool_modclkcfg.c | 1117 CLK->PCLKDIV = (CLK_PCLKDIV_PCLK0DIV2 | CLK_PCLKDIV_PCLK1DIV2); in nutool_modclkcfg_init_base()
1120 …CLK->AHBCLK0 |= CLK_AHBCLK0_GPACKEN_Msk | CLK_AHBCLK0_GPBCKEN_Msk | CLK_AHBCLK0_GPCCKEN_Msk | CLK_… in nutool_modclkcfg_init_base()
1122 CLK->AHBCLK1 |= CLK_AHBCLK1_GPICKEN_Msk | CLK_AHBCLK1_GPJCKEN_Msk; in nutool_modclkcfg_init_base()
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| /bsp/nuvoton/libraries/m2354/ |
| A D | README.md | 10 | CLK | RT_Device_Class_PM | ***pm*** |
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| /bsp/nuvoton/libraries/m480/ |
| A D | README.md | 10 | CLK | RT_Device_Class_PM | ***pm*** |
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