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Searched refs:CLKGEN_BASEADDR (Results 1 – 1 of 1) sorted by relevance

/bsp/yichip/yc3121-pos/Libraries/core/
A Dyc3121.h82 #define CLKGEN_BASEADDR 0xf8560 macro
143 #define SYSCTRL_HCLK_CON *(volatile int*)(CLKGEN_BASEADDR + 0x00)
144 #define SYSCTRL_RSACLK *(volatile int*)(CLKGEN_BASEADDR + 0x08)
145 #define SYSCTRL_CLK_CLS *(volatile int*)(CLKGEN_BASEADDR + 0x0c)
146 #define SYSCTRL_RST_EN *(volatile int*)(CLKGEN_BASEADDR + 0x14)
147 #define SYSCTRL_RST_TYPE *(volatile int*)(CLKGEN_BASEADDR + 0x18)
148 #define SYSCTRL_RESET *(volatile int*)(CLKGEN_BASEADDR + 0x1c)

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