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Searched refs:CLK_DIV (Results 1 – 12 of 12) sorted by relevance

/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/inc/
A Dn32g45x_qspi.h102 uint32_t CLK_DIV; member
189 #define IS_QSPI_CLK_DIV(CLK_DIV) (((CLK_DIV) <= 0xFFFF)) argument
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/inc/
A Dn32g4fr_qspi.h102 uint32_t CLK_DIV; member
190 #define IS_QSPI_CLK_DIV(CLK_DIV) (((CLK_DIV) <= 0xFFFF)) argument
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/inc/
A Dn32g45x_qspi.h102 uint32_t CLK_DIV; member
194 #define IS_QSPI_CLK_DIV(CLK_DIV) (((CLK_DIV) <= 0xFFFF)) argument
/bsp/yichip/yc3122-pos/Libraries/sdk/
A Dyc_wdt.c21 MWDT->CONFIG.bit.CLK_DIV = Wdtclkdiv; in WDT_CLKDIV()
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_qspi.c127 assert_param(IS_QSPI_CLK_DIV(QSPI_InitStruct->CLK_DIV)); in QspiInitConfig()
180 QSPI->BAUD = QSPI_InitStruct->CLK_DIV; in QspiInitConfig()
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_qspi.c127 assert_param(IS_QSPI_CLK_DIV(QSPI_InitStruct->CLK_DIV)); in QspiInitConfig()
180 QSPI->BAUD = QSPI_InitStruct->CLK_DIV; in QspiInitConfig()
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/
A Dn32g45x_qspi.c132 assert_param(IS_QSPI_CLK_DIV(QSPI_InitStruct->CLK_DIV)); in QspiInitConfig()
186 QSPI->BAUD = QSPI_InitStruct->CLK_DIV; in QspiInitConfig()
/bsp/acm32/acm32f0x0-nucleo/libraries/Device/
A DACM32F0x0.h310 __IO uint32_t CLK_DIV; // 0x04 member
/bsp/acm32/acm32f4xx-nucleo/libraries/Device/
A DACM32F4.h289 __IO uint32_t CLK_DIV; member
/bsp/acm32/acm32f4xx-nucleo/libraries/HAL_Driver/Src/
A DHAL_I2C.c978 hi2c->Instance->CLK_DIV = APB_Clock / (4 * ClockSpeed) - 1; in I2C_Set_Clock_Speed()
/bsp/acm32/acm32f0x0-nucleo/libraries/HAL_Driver/Src/
A DHAL_I2C.c974 hi2c->Instance->CLK_DIV = APB_Clock / (4 * ClockSpeed) - 1; in I2C_Set_Clock_Speed()
/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/
A Dyc3122.h1110 __IOM uint32_t CLK_DIV : 4; /*!< [19..16] HSPI预分频位 member
1356 __IOM uint32_t CLK_DIV : 4; /*!< [10..7] hclk预分频,最大16分频,实际使用的时钟频率 member
3029 __IOM uint32_t CLK_DIV : 3; /*!< [2..0] SPICLK 分频系数 (1<<CTRL[2:0 member

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