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Searched refs:CLK_DRAM_GATE (Results 1 – 4 of 4) sorted by relevance

/bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/sun8iw18p1/
A Dclk_sun8iw18.h94 #define CLK_DRAM_GATE (volatile uint32_t *)(CCU_REG_BASE + 0x080C) macro
A Dclk_sun8iw18.c635 … 0, 0, 0, 0, CLK_DRAM_GATE, CLK_DRAM_GATE, …
/bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/sun8iw19p1/
A Dclk_sun8iw19.h108 #define CLK_DRAM_GATE (volatile uint32_t *)(CCU_REG_BASE + 0x080C) macro
A Dclk_sun8iw19.c860 … 0, 0, 0, 0, CLK_DRAM_GATE, CLK_DRAM_GATE, 0, …

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