Searched refs:CLK_PLL_PERI1PAT0 (Results 1 – 4 of 4) sorted by relevance
| /bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/sun8iw18p1/ |
| A D | clk_sun8iw18.h | 62 #define CLK_PLL_PERI1PAT0 (volatile uint32_t *)(CCU_REG_BASE + 0x0128) macro
|
| A D | clk_sun8iw18.c | 567 …0, 0, 1, 1, 0, 1, 0, 0, 0, 31, 24, 0, CLK_PLL_PERI1PAT0, 0xd1303333,…
|
| /bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/sun8iw19p1/ |
| A D | clk_sun8iw19.h | 63 #define CLK_PLL_PERI1PAT0 (volatile uint32_t *)(CCU_REG_BASE + 0x0128) macro
|
| A D | clk_sun8iw19.c | 771 …0, 0, 1, 1, 0, 1, 0, 0, 0, 31, 24, 0, CLK_PLL_PERI1PAT0, 0xd1303333,…
772 … 0, 0, 1, 1, 0, 0, 0, 0, 0, 31, 0, 0, CLK_PLL_PERI1PAT0, 0xd1303333,…
|
Completed in 17 milliseconds