Searched refs:CLK_PLL_PERIPH0 (Results 1 – 8 of 8) sorted by relevance
| /bsp/allwinner/libraries/sunxi-hal/hal/source/spi/platform/ |
| A D | spi_sun8iw20.h | 60 #define SUNXI_CLK_PLL_SPI CLK_PLL_PERIPH0
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| /bsp/allwinner/libraries/sunxi-hal/hal/source/disp2/soc/ |
| A D | sun20iw1.c | 115 CLK_PLL_PERIPH0,
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| /bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi-ng/ |
| A D | ccu-sun8iw20.h | 16 #define CLK_PLL_PERIPH0 5 macro
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| A D | ccu-sun8iw20.c | 971 [CLK_PLL_PERIPH0] = &pll_periph0_clk.hw,
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| /bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/sun8iw18p1/ |
| A D | clk_sun8iw18.h | 53 #define CLK_PLL_PERIPH0 (volatile uint32_t *)(CCU_REG_BASE + 0x0020) macro
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| A D | clk_sun8iw18.c | 574 SUNXI_CLK_FACTORS_INIT(pll_periph0, CLK_PLL_PERIPH0, CLK_PLL_PERIPH0, 28, CLK_PLL_PERIPH0, 29);
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| /bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/sun8iw19p1/ |
| A D | clk_sun8iw19.h | 53 #define CLK_PLL_PERIPH0 (volatile uint32_t *)(CCU_REG_BASE + 0x0020) macro
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| A D | clk_sun8iw19.c | 779 SUNXI_CLK_FACTORS_INIT(pll_periph0, CLK_PLL_PERIPH0, CLK_PLL_PERIPH0, 28, CLK_PLL_PERIPH0, 29);
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