Searched refs:CLK_SET_RATE_PARENT (Results 1 – 7 of 7) sorted by relevance
| /bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi-ng/ |
| A D | clk-fixed-factor.c | 33 if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) in clk_factor_round_rate()
53 if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) in clk_factor_set_rate()
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| A D | ccu-sun8iw20.c | 221 0x500, 24, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL);
260 CLK_SET_RATE_PARENT);
269 CLK_SET_RATE_PARENT);
303 CLK_SET_RATE_PARENT);
793 1, 4, CLK_SET_RATE_PARENT);
796 1, 2, CLK_SET_RATE_PARENT);
804 1, 4, CLK_SET_RATE_PARENT);
807 1, 2, CLK_SET_RATE_PARENT);
815 4, 1, CLK_SET_RATE_PARENT);
818 2, 1, CLK_SET_RATE_PARENT);
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| A D | ccu_gate.c | 106 if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) in ccu_gate_round_rate()
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| A D | ccu.c | 260 else if (core->flags & CLK_SET_RATE_PARENT) in clk_core_round_rate_nolock()
311 if (core->flags & CLK_SET_RATE_PARENT) in clk_mux_determine_rate_flags()
344 if (core->flags & CLK_SET_RATE_PARENT) in clk_mux_determine_rate_flags()
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| A D | ccu.h | 64 #define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */ macro
757 (clk_hw_get_flags((hw)) & CLK_SET_RATE_PARENT)
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| A D | clk-divider.c | 417 if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) in clk_divider_bestdiv()
486 if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) in divider_ro_round_rate_parent()
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| A D | ccu_mp.c | 143 if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) in ccu_mp_round_rate()
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