CLK_SOURCE_PLL_40MHz (reference) in projects: bsp

Searched refs:CLK_SOURCE_PLL_40MHz (Results 1 – 3 of 3) sorted by relevance

/bsp/wch/arm/ch579m/board/
A D	board.c	`45 SetSysClock(CLK_SOURCE_PLL_40MHz); in rt_hw_board_init()`
/bsp/wch/arm/ch579m/libraries/StdPeriphDriver/inc/
A D	CH57x_clk.h	`24 CLK_SOURCE_PLL_40MHz, enumerator`
/bsp/wch/arm/ch579m/libraries/StdPeriphDriver/
A D	CH57x_clk.c	`83 case CLK_SOURCE_PLL_40MHz: in SetSysClock()`

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