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Searched refs:CLK_SRC_GROUP_AXI0 (Results 1 – 2 of 2) sorted by relevance

/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6700/HPM6750/
A Dhpm_clock_drv.h50 #define CLK_SRC_GROUP_AXI0 (6U) macro
179 clock_sdp = MAKE_CLOCK_NAME(sysctl_resource_sdp0, CLK_SRC_GROUP_AXI0, 0),
180 clock_xdma = MAKE_CLOCK_NAME(sysctl_resource_dma1, CLK_SRC_GROUP_AXI0, 1),
181 clock_rom = MAKE_CLOCK_NAME(sysctl_resource_rom0, CLK_SRC_GROUP_AXI0, 2),
182 clock_ram0 = MAKE_CLOCK_NAME(sysctl_resource_ram0, CLK_SRC_GROUP_AXI0, 3),
183 clock_ram1 = MAKE_CLOCK_NAME(sysctl_resource_ram1, CLK_SRC_GROUP_AXI0, 4),
A Dhpm_clock_drv.c118 case CLK_SRC_GROUP_AXI0: in clock_get_frequency()
302 case CLK_SRC_GROUP_AXI0: in clock_get_source()
363 case CLK_SRC_GROUP_AXI0: in clock_get_divider()
477 case CLK_SRC_GROUP_AXI0: in clock_set_source_divider()

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