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Searched refs:CLK_Struct (Results 1 – 2 of 2) sorted by relevance

/bsp/Vango/v85xxp/drivers/
A Dboard.c28 CLK_InitTypeDef CLK_Struct; in SystemClock_Config() local
30 CLK_Struct.ClockType = CLK_TYPE_AHBSRC \ in SystemClock_Config()
34 CLK_Struct.AHBSource = CLK_AHBSEL_LSPLL; in SystemClock_Config()
36 CLK_Struct.PLLL.Frequency = CLK_PLLL_26_2144MHz; in SystemClock_Config()
37 CLK_Struct.PLLL.Source = CLK_PLLLSRC_XTALL; in SystemClock_Config()
38 CLK_Struct.PLLL.State = CLK_PLLL_ON; in SystemClock_Config()
39 CLK_Struct.HCLK.Divider = 1; in SystemClock_Config()
40 CLK_Struct.PCLK.Divider = 2; in SystemClock_Config()
41 CLK_ClockConfig(&CLK_Struct); in SystemClock_Config()
/bsp/Vango/v85xx/drivers/
A Dboard.c28 CLK_InitTypeDef CLK_Struct; in SystemClock_Config() local
30 CLK_Struct.ClockType = CLK_TYPE_AHBSRC \ in SystemClock_Config()
34 CLK_Struct.AHBSource = CLK_AHBSEL_LSPLL; in SystemClock_Config()
36 CLK_Struct.PLLL.Frequency = CLK_PLLL_26_2144MHz; in SystemClock_Config()
37 CLK_Struct.PLLL.Source = CLK_PLLLSRC_XTALL; in SystemClock_Config()
38 CLK_Struct.PLLL.State = CLK_PLLL_ON; in SystemClock_Config()
39 CLK_Struct.HCLK.Divider = 1; in SystemClock_Config()
40 CLK_Struct.PCLK.Divider = 2; in SystemClock_Config()
41 CLK_ClockConfig(&CLK_Struct); in SystemClock_Config()

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