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Searched refs:CLRINT (Results 1 – 3 of 3) sorted by relevance

/bsp/rm48x50/drivers/
A Ddrv_uart.c70 scilinREG->CLRINT = 0xFFFFFFFFU; in _configure()
142 sci->CLRINT = SCI_RX_INT; in _control()
/bsp/rm48x50/HALCoGen/include/
A Dreg_sci.h44 uint32 CLRINT; /**< 0x0010 Clear Interrupt Enable Register */ member
A Dreg_lin.h45 uint32 CLRINT; /**< 0x0010: Clear interrupt enable register */ member

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