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Searched refs:CONFIG (Results 1 – 25 of 134) sorted by relevance

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/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_tsns_drv.h55 ptr->CONFIG |= TSNS_CONFIG_ENABLE_MASK; in tsns_enable()
65 ptr->CONFIG &= ~TSNS_CONFIG_ENABLE_MASK; in tsns_disable()
172 ptr->CONFIG |= TSNS_CONFIG_RST_EN_MASK; in tsns_enable_limit_trigger_reset()
182 ptr->CONFIG &= ~TSNS_CONFIG_RST_EN_MASK; in tsns_disable_limit_trigger_irq()
214 ptr->CONFIG |= TSNS_CONFIG_IRQ_EN_MASK; in tsns_enable_limit_trigger_irq()
303 ptr->CONFIG = (ptr->CONFIG & ~TSNS_CONFIG_SPEED_MASK) | TSNS_CONFIG_SPEED_SET(speed); in tsns_set_speed()
314 ptr->CONFIG = (ptr->CONFIG & ~TSNS_CONFIG_AVERAGE_MASK) | TSNS_CONFIG_AVERAGE_SET(average); in tsns_set_average()
324 ptr->CONFIG |= TSNS_CONFIG_ASYNC_MASK; in tsns_enable_async_mode()
334 ptr->CONFIG &= ~TSNS_CONFIG_ASYNC_MASK; in tsns_disable_async_mode()
364 uint32_t tmp = ptr->CONFIG; in tsns_trigger_measurement()
[all …]
A Dhpm_bacc_drv.h79 ptr->CONFIG &= ~BACC_CONFIG_FAST_READ_MASK; in bacc_disable_fast_read()
89 ptr->CONFIG |= BACC_CONFIG_FAST_READ_MASK; in bacc_enable_fast_read()
99 ptr->CONFIG &= ~BACC_CONFIG_FAST_WRITE_MASK; in bacc_disable_fast_write()
109 ptr->CONFIG |= BACC_CONFIG_FAST_WRITE_MASK; in bacc_enable_fast_write()
120 ptr->CONFIG = (ptr->CONFIG & ~(BACC_CONFIG_TIMING_MASK)) in bacc_set_timing()
A Dhpm_pllctlv2_drv.h87 …ptr->PLL[pll].CONFIG = (ptr->PLL[pll].CONFIG & PLLCTLV2_PLL_CONFIG_REFSEL_MASK) | PLLCTLV2_PLL_CON… in pllctlv2_select_reference_clock()
106 ptr->PLL[pll].CONFIG &= ~PLLCTLV2_PLL_CONFIG_SPREAD_MASK; in pllctlv2_disable_spread_spectrum()
/bsp/microchip/samc21/bsp/hri/
A Dhri_eic_c21.h714 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN0_bit()
723 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN0_bit()
726 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN0_bit()
754 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN1_bit()
763 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN1_bit()
766 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN1_bit()
794 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN2_bit()
803 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN2_bit()
806 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN2_bit()
834 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN3_bit()
[all …]
A Dhri_wdt_c21.h388 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_PER_bf()
397 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_write_CONFIG_PER_bf()
400 ((Wdt *)hw)->CONFIG.reg = tmp; in hri_wdt_write_CONFIG_PER_bf()
421 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_read_CONFIG_PER_bf()
436 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_WINDOW_bf()
445 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_write_CONFIG_WINDOW_bf()
448 ((Wdt *)hw)->CONFIG.reg = tmp; in hri_wdt_write_CONFIG_WINDOW_bf()
469 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_read_CONFIG_WINDOW_bf()
484 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_reg()
492 ((Wdt *)hw)->CONFIG.reg = data; in hri_wdt_write_CONFIG_reg()
[all …]
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_eic_d51.h740 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN0_bit()
749 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN0_bit()
752 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN0_bit()
780 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN1_bit()
789 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN1_bit()
792 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN1_bit()
820 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN2_bit()
829 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN2_bit()
832 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN2_bit()
860 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN3_bit()
[all …]
A Dhri_wdt_d51.h388 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_PER_bf()
397 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_write_CONFIG_PER_bf()
400 ((Wdt *)hw)->CONFIG.reg = tmp; in hri_wdt_write_CONFIG_PER_bf()
421 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_read_CONFIG_PER_bf()
436 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_WINDOW_bf()
445 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_write_CONFIG_WINDOW_bf()
448 ((Wdt *)hw)->CONFIG.reg = tmp; in hri_wdt_write_CONFIG_WINDOW_bf()
469 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_read_CONFIG_WINDOW_bf()
484 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_reg()
492 ((Wdt *)hw)->CONFIG.reg = data; in hri_wdt_write_CONFIG_reg()
[all …]
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_eic_d51.h740 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN0_bit()
749 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN0_bit()
752 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN0_bit()
780 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN1_bit()
789 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN1_bit()
792 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN1_bit()
820 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN2_bit()
829 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN2_bit()
832 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN2_bit()
860 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN3_bit()
[all …]
A Dhri_wdt_d51.h388 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_PER_bf()
397 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_write_CONFIG_PER_bf()
400 ((Wdt *)hw)->CONFIG.reg = tmp; in hri_wdt_write_CONFIG_PER_bf()
421 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_read_CONFIG_PER_bf()
436 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_WINDOW_bf()
445 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_write_CONFIG_WINDOW_bf()
448 ((Wdt *)hw)->CONFIG.reg = tmp; in hri_wdt_write_CONFIG_WINDOW_bf()
469 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_read_CONFIG_WINDOW_bf()
484 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_reg()
492 ((Wdt *)hw)->CONFIG.reg = data; in hri_wdt_write_CONFIG_reg()
[all …]
/bsp/microchip/same54/bsp/hri/
A Dhri_eic_e54.h740 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN0_bit()
749 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN0_bit()
752 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN0_bit()
780 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN1_bit()
789 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN1_bit()
792 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN1_bit()
820 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN2_bit()
829 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN2_bit()
832 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN2_bit()
860 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN3_bit()
[all …]
A Dhri_wdt_e54.h388 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_PER_bf()
397 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_write_CONFIG_PER_bf()
400 ((Wdt *)hw)->CONFIG.reg = tmp; in hri_wdt_write_CONFIG_PER_bf()
421 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_read_CONFIG_PER_bf()
436 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_WINDOW_bf()
445 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_write_CONFIG_WINDOW_bf()
448 ((Wdt *)hw)->CONFIG.reg = tmp; in hri_wdt_write_CONFIG_WINDOW_bf()
469 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_read_CONFIG_WINDOW_bf()
484 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_reg()
492 ((Wdt *)hw)->CONFIG.reg = data; in hri_wdt_write_CONFIG_reg()
[all …]
/bsp/microchip/saml10/bsp/hri/
A Dhri_eic_l10.h786 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN0_bit()
795 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN0_bit()
798 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN0_bit()
826 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN1_bit()
835 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN1_bit()
838 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN1_bit()
866 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN2_bit()
875 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_write_CONFIG_FILTEN2_bit()
878 ((Eic *)hw)->CONFIG[index].reg = tmp; in hri_eic_write_CONFIG_FILTEN2_bit()
906 tmp = ((Eic *)hw)->CONFIG[index].reg; in hri_eic_get_CONFIG_FILTEN3_bit()
[all …]
A Dhri_wdt_l10.h438 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_PER_bf()
447 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_write_CONFIG_PER_bf()
450 ((Wdt *)hw)->CONFIG.reg = tmp; in hri_wdt_write_CONFIG_PER_bf()
471 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_read_CONFIG_PER_bf()
486 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_WINDOW_bf()
495 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_write_CONFIG_WINDOW_bf()
498 ((Wdt *)hw)->CONFIG.reg = tmp; in hri_wdt_write_CONFIG_WINDOW_bf()
519 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_read_CONFIG_WINDOW_bf()
534 tmp = ((Wdt *)hw)->CONFIG.reg; in hri_wdt_get_CONFIG_reg()
542 ((Wdt *)hw)->CONFIG.reg = data; in hri_wdt_write_CONFIG_reg()
[all …]
/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_tsns_drv.c15 ptr->CONFIG |= TSNS_CONFIG_IRQ_EN_MASK | TSNS_CONFIG_COMPARE_MIN_EN_MASK; in tsns_configure_low_limit_event()
19 ptr->CONFIG |= TSNS_CONFIG_RST_EN_MASK | TSNS_CONFIG_COMPARE_MIN_EN_MASK; in tsns_configure_low_limit_event()
31 ptr->CONFIG |= TSNS_CONFIG_IRQ_EN_MASK | TSNS_CONFIG_COMPARE_MAX_EN_MASK; in tsns_configure_high_limit_event()
35 ptr->CONFIG |= TSNS_CONFIG_RST_EN_MASK | TSNS_CONFIG_COMPARE_MAX_EN_MASK; in tsns_configure_high_limit_event()
48 …ptr->CONFIG |= TSNS_CONFIG_IRQ_EN_MASK | TSNS_CONFIG_COMPARE_MAX_EN_MASK | TSNS_CONFIG_COMPARE_MIN… in tsns_configure_limit_event()
52 …ptr->CONFIG |= TSNS_CONFIG_RST_EN_MASK | TSNS_CONFIG_COMPARE_MAX_EN_MASK | TSNS_CONFIG_COMPARE_MIN… in tsns_configure_limit_event()
/bsp/yichip/yc3122-pos/Libraries/sdk/
A Dyc_wdt.c21 MWDT->CONFIG.bit.CLK_DIV = Wdtclkdiv; in WDT_CLKDIV()
33 MWDT->CONFIG.bit.RELOAD = Reload; in WDT_SetReload()
53 MWDT->CONFIG.bit.EN = ENABLE; in WDT_Enable()
71 MWDT->CONFIG.bit.MODE = WDT_CPUReset; in WDT_ModeConfig()
76 MWDT->CONFIG.bit.MODE = WDT_Interrupt; in WDT_ModeConfig()
/bsp/acm32/acm32f0x0-nucleo/libraries/HAL_Driver/Src/
A DHAL_DMA.c87 DMA->CONFIG = DMA_CONFIG_EN; in HAL_DMA_Init()
90 hdma->Instance->CONFIG = 0x00000000; in HAL_DMA_Init()
101 hdma->Instance->CONFIG = hdma->Init.Data_Flow | hdma->Init.Request_ID; in HAL_DMA_Init()
183 hdma->Instance->CONFIG |= DMA_CHANNEL_CONFIG_EN; in HAL_DMA_NormalMode_Start()
214 … hdma->Instance->CONFIG |= DMA_CHANNEL_CONFIG_ITC | DMA_CHANNEL_CONFIG_IE | DMA_CHANNEL_CONFIG_EN; in HAL_DMA_NormalMode_Start_IT()
259 hdma->Instance->CONFIG |= DMA_CHANNEL_CONFIG_EN; in HAL_DMA_CycleMode_Start()
304 … hdma->Instance->CONFIG |= DMA_CHANNEL_CONFIG_ITC | DMA_CHANNEL_CONFIG_IE | DMA_CHANNEL_CONFIG_EN; in HAL_DMA_CycleMode_Start_IT()
382 hdma->Instance->CONFIG &= ~(1 << 0); in HAL_DMA_Abort()
/bsp/acm32/acm32f4xx-nucleo/libraries/HAL_Driver/Src/
A DHAL_DMA.c87 DMA->CONFIG = DMA_CONFIG_EN; in HAL_DMA_Init()
90 hdma->Instance->CONFIG = 0x00000000; in HAL_DMA_Init()
101 hdma->Instance->CONFIG = hdma->Init.Data_Flow | hdma->Init.Request_ID; in HAL_DMA_Init()
181 hdma->Instance->CONFIG |= DMA_CHANNEL_CONFIG_EN; in HAL_DMA_NormalMode_Start()
212 … hdma->Instance->CONFIG |= DMA_CHANNEL_CONFIG_ITC | DMA_CHANNEL_CONFIG_IE | DMA_CHANNEL_CONFIG_EN; in HAL_DMA_NormalMode_Start_IT()
257 hdma->Instance->CONFIG |= DMA_CHANNEL_CONFIG_EN; in HAL_DMA_CycleMode_Start()
302 … hdma->Instance->CONFIG |= DMA_CHANNEL_CONFIG_ITC | DMA_CHANNEL_CONFIG_IE | DMA_CHANNEL_CONFIG_EN; in HAL_DMA_CycleMode_Start_IT()
380 hdma->Instance->CONFIG &= ~(1 << 0); in HAL_DMA_Abort()
/bsp/bouffalo_lab/bl808/m0/
A Dcombine.sh10 CONFIG=../config
31 ./$TOOL_DIR/bflb_fw_post_proc/$TOOL_NAME --chipname=$CHIPNAME --brdcfgdir=$CONFIG --imgfile=$BIN_FI…
/bsp/bouffalo_lab/bl808/lp/
A Dcombine.sh10 CONFIG=../config
31 ./$TOOL_DIR/bflb_fw_post_proc/$TOOL_NAME --chipname=$CHIPNAME --brdcfgdir=$CONFIG --imgfile=$BIN_FI…
/bsp/bouffalo_lab/bl60x/
A Dcombine.sh10 CONFIG=./board/config
31 ./$TOOL_DIR/bflb_fw_post_proc/$TOOL_NAME --chipname=$CHIPNAME --brdcfgdir=$CONFIG --imgfile=$BIN_FI…
/bsp/bouffalo_lab/bl61x/
A Dcombine.sh10 CONFIG=./board/config
31 ./$TOOL_DIR/bflb_fw_post_proc/$TOOL_NAME --chipname=$CHIPNAME --brdcfgdir=$CONFIG --imgfile=$BIN_FI…
/bsp/bouffalo_lab/bl70x/
A Dcombine.sh10 CONFIG=./board/config
31 ./$TOOL_DIR/bflb_fw_post_proc/$TOOL_NAME --chipname=$CHIPNAME --brdcfgdir=$CONFIG --imgfile=$BIN_FI…
/bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Inc/
A Dft32f0xx_syscfg.h180 #define IS_SYSCFG_LOCK_CONFIG(CONFIG) (((CONFIG) == SYSCFG_Break_PVD) || \ argument
181 ((CONFIG) == SYSCFG_Break_Lockup))
/bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/HT32F1xxxx_Driver/inc/
A Dht32f1xxxx_i2c.h270 #define IS_I2C_SEQ_FILTER_MASK(CONFIG) ((CONFIG == SEQ_FILTER_DISABLE) || \ argument
271 (CONFIG == SEQ_FILTER_1_PCLK) || \
272 (CONFIG == SEQ_FILTER_2_PCLK))
/bsp/samd21/sam_d2x_asflib/sam0/drivers/wdt/
A Dwdt.c124 WDT_module->CONFIG.reg = new_config; in wdt_set_config()
217 WDT_module->CONFIG.reg = new_config; in wdt_set_config()

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