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Searched refs:CONF_GCLK_CAN0_SRC (Results 1 – 2 of 2) sorted by relevance

/bsp/microchip/samc21/bsp/config/
A Dperipheral_clk_config.h195 #ifndef CONF_GCLK_CAN0_SRC
196 #define CONF_GCLK_CAN0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val macro
/bsp/microchip/samc21/bsp/
A Ddriver_init.c155 hri_gclk_write_PCHCTRL_reg(GCLK, CAN0_GCLK_ID, CONF_GCLK_CAN0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); in CAN_0_init()

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