Searched refs:CONF_GCLK_SERCOM0_CORE_SRC (Results 1 – 4 of 4) sorted by relevance

/bsp/microchip/saml10/bsp/config/
A D	peripheral_clk_config.h	55 #ifndef CONF_GCLK_SERCOM0_CORE_SRC 56 #define CONF_GCLK_SERCOM0_CORE_SRC GCLK_PCHCTRL_GEN_GCLK0_Val macro
/bsp/microchip/samc21/bsp/config/
A D	peripheral_clk_config.h	67 #ifndef CONF_GCLK_SERCOM0_CORE_SRC 68 #define CONF_GCLK_SERCOM0_CORE_SRC GCLK_PCHCTRL_GEN_GCLK0_Val macro
/bsp/microchip/saml10/bsp/
A D	driver_init.c	75 …hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_CORE, CONF_GCLK_SERCOM0_CORE_SRC | (1 << GCLK_PCH… in I2C_0_CLOCK_init()
/bsp/microchip/samc21/bsp/
A D	driver_init.c	90 …hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_CORE, CONF_GCLK_SERCOM0_CORE_SRC | (1 << GCLK_PCH… in I2C_0_CLOCK_init()

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