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Searched refs:CONF_GCLK_SERCOM7_SLOW_SRC (Results 1 – 2 of 2) sorted by relevance

/bsp/microchip/same54/bsp/config/
A Dperipheral_clk_config.h195 #ifndef CONF_GCLK_SERCOM7_SLOW_SRC
196 #define CONF_GCLK_SERCOM7_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK1_Val macro
/bsp/microchip/same54/bsp/
A Ddriver_init.c130 …hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM7_GCLK_ID_SLOW, CONF_GCLK_SERCOM7_SLOW_SRC | (1 << GCLK_PCH… in I2C_0_CLOCK_init()

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