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Searched refs:CPU_DIV (Results 1 – 3 of 3) sorted by relevance

/bsp/loongson/ls1cdev/drivers/
A Dboard.h60 #define CPU_DIV (2) /* CPU clock is PLL divided by 2 */ macro
A Dselfboot.h15 #define SD_FREQ (((APB_CLK / 4) * (PLL_MULT / CPU_DIV)) / SDRAM_PARAM_DIV_NUM)
A Dselfboot_gcc.S193 li t3, (0x00008003 | (CPU_DIV << 8)) /* set CPU DEV */

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