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Searched refs:CRL_APB_GEM_DIV0_SHIFT (Results 1 – 2 of 2) sorted by relevance

/bsp/zynqmp-r5-axu4ev/drivers/Zynq_HAL_Driver/xemacpsif/netif/
A Dxemacpsif.h81 #define CRL_APB_GEM_DIV0_SHIFT 8 macro
/bsp/zynqmp-r5-axu4ev/drivers/Zynq_HAL_Driver/xemacpsif/
A Dxemacpsif_physpeed.c1074 CrlApbGemCtrl |= CrlApbDiv0 << CRL_APB_GEM_DIV0_SHIFT; in SetUpSLCRDivisors()

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