| /bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Src/ |
| A D | ft32f0xx_crs.c | 51 CRS->CR &= ~CRS_CR_TRIM; in CRS_AdjustHSI48CalibrationValue()
71 CRS->CR |= CRS_CR_CEN; in CRS_FrequencyErrorCounterCmd()
75 CRS->CR &= ~CRS_CR_CEN; in CRS_FrequencyErrorCounterCmd()
107 CRS->CR |= CRS_CR_SWSYNC; in CRS_SoftwareSynchronizationGenerate()
170 CRS->CFGR |= CRS_Prescaler; in CRS_SynchronizationPrescalerConfig()
192 CRS->CFGR |= CRS_Source; in CRS_SynchronizationSourceConfig()
213 CRS->CFGR |= CRS_Polarity; in CRS_SynchronizationPolarityConfig()
280 CRS->CR |= CRS_IT; in CRS_ITConfig()
284 CRS->CR &= ~CRS_IT; in CRS_ITConfig()
333 CRS->ICR |= CRS_FLAG; in CRS_ClearFlag()
[all …]
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| /bsp/apm32/libraries/APM32F0xx_Library/APM32F0xx_StdPeriphDriver/src/ |
| A D | apm32f0xx_crs.c | 102 CRS->CTRL_B.CNTEN = SET; in CRS_EnableFrequencyErrorCounter()
114 CRS->CTRL_B.CNTEN = RESET; in CRS_DisableFrequencyErrorCounter()
126 CRS->CTRL_B.AUTOTRMEN = SET; in CRS_EnableAutomaticCalibration()
138 CRS->CTRL_B.AUTOTRMEN = RESET; in CRS_DisableAutomaticCalibration()
150 CRS->CTRL_B.SWSGNR = SET; in CRS_GenerateSoftwareSynchronization()
163 CRS->CFG_B.RLDVAL = reloadVal; in CRS_FrequencyErrorCounterReloadValue()
196 CRS->CFG_B.SYNCPSC = div; in CRS_ConfigSynchronizationPrescaler()
295 CRS->CTRL |= interrupt; in CRS_EnableInterrupt()
312 CRS->CTRL &= ~interrupt; in CRS_DisableInterrupt()
385 if ((CRS->INTSTS & flag)) in CRS_ReadIntFlag()
[all …]
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| /bsp/mm32f327x/Libraries/MM32F327x/Include/ |
| A D | reg_crs.h | 66 #define CRS ((CRS_TypeDef*) CRS_BASE) macro
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| /bsp/m16c62p/drivers/ |
| A D | iom16c62p.h | 1007 unsigned char CRS :1; /* CTS~/RTS~ function select bit */ member
1183 unsigned char CRS :1; /* CTS~/RTS~ function select bit */ member
1274 unsigned char CRS :1; /* CTS~/RTS~ function select bit */ member
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| /bsp/apm32/libraries/APM32F0xx_Library/Device/Geehy/APM32F0xx/Source/arm/ |
| A D | startup_apm32f071.s | 80 DCD RCM_CRS_IRQHandler ; RCM and CRS
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| A D | startup_apm32f072.s | 80 DCD RCM_CRS_IRQHandler ; RCM and CRS
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| A D | startup_apm32f091.s | 80 DCD RCM_CRS_IRQHandler ; RCM and CRS
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| /bsp/mm32l07x/Libraries/MM32L0xx/Source/KEIL_StartAsm/ |
| A D | startup_MM32L0xx.s | 58 DCD RCC_CRS_IRQHandler ; RCC & CRS
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| /bsp/apm32/libraries/APM32F0xx_Library/Device/Geehy/APM32F0xx/Source/iar/ |
| A D | startup_apm32f072.s | 61 DCD RCM_CRS_IRQHandler ; RCM and CRS
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| A D | startup_apm32f091.s | 61 DCD RCM_CRS_IRQHandler ; RCM and CRS
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| /bsp/mm32l07x/Libraries/MM32L0xx/Source/IAR_StartAsm/ |
| A D | startup_MM32L0xx.s | 70 DCD RCC_CRS_IRQHandler ; RCC & CRS
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| /bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/source/iar/ |
| A D | startup_ft32f072xb.s | 79 DCD RCC_CRS_IRQHandler ; RCC and CRS
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| /bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/MDK-ARM/ |
| A D | startup_stm32h7s7xx.s | 204 DCD CRS_IRQHandler ; CRS
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| /bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ |
| A D | ft32f030x6.h | 730 #define CRS ((CRS_TypeDef *) CRS_BASE) macro
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| A D | ft32f030x8.h | 768 #define CRS ((CRS_TypeDef *) CRS_BASE) macro
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| A D | ft32f072x8.h | 777 #define CRS ((CRS_TypeDef *) CRS_BASE) macro
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| A D | ft32f032x8.h | 779 #define CRS ((CRS_TypeDef *) CRS_BASE) macro
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| A D | ft32f032x6.h | 779 #define CRS ((CRS_TypeDef *) CRS_BASE) macro
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| A D | ft32f072xb.h | 827 #define CRS ((CRS_TypeDef *) CRS_BASE) macro
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| /bsp/mm32l07x/Libraries/MM32L0xx/Include/ |
| A D | MM32L0xx.h | 1007 #define CRS ((CRS_TypeDef *) CRS_BASE) macro
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| /bsp/apm32/libraries/APM32F0xx_Library/Device/Geehy/APM32F0xx/Include/ |
| A D | apm32f0xx.h | 5538 #define CRS ((CRS_T*) CRS_BASE) macro
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| /bsp/stm32/stm32h563-st-nucleo/ |
| A D | startup_stm32h563xx.lst | 304 152 0000016C 00000000 DCD CRS_IRQHandler ; CRS global int
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| /bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Device/MM32/MM32F3277/Include/ |
| A D | mm32f3277g.h | 2415 #define CRS ((CRS_Type*)CRS_BASE) macro
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| /bsp/frdm-k64f/device/ |
| A D | MK64F12.h | 2034 …__IO uint32_t CRS; /**< Control Register, array offset: 0x10, array … member
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| /bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/ |
| A D | RV32M1_ri5cy.h | 1209 …__IO uint32_t CRS; /**< Control Register, array offset: 0x10, array … member
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