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Searched refs:CTL1 (Results 1 – 15 of 15) sorted by relevance

/bsp/nuvoton/libraries/ma35/rtt_port/
A Ddrv_ecap.c74 #define ECAP_GET_CLK_DIV_INDEX(ecap) ((ecap)->CTL1 = ((ecap)->CTL1 & ECAP_CTL1_CLKSEL_Msk)…
170 …return ((float)1000000 / ((float)CLK_GetPCLK2Freq() / u8ClockDivider[(psNuEcap->base->CTL1 & ECAP_… in get_ecap_tick_time_us()
172 …return ((float)1000000 / ((float)CLK_GetPCLK1Freq() / u8ClockDivider[(psNuEcap->base->CTL1 & ECAP_… in get_ecap_tick_time_us()
A Ddrv_i2c.c168 nu_i2c->I2C->CTL1 |= I2C_CTL1_ADDR10EN_Msk; in nu_i2c_send_address()
380 nu_i2c->I2C->CTL1 = 0; /*clear all sub modes like 10 bit mode*/ in nu_i2c_mst_xfer()
/bsp/nuvoton/libraries/m460/rtt_port/
A Ddrv_ecap.c80 #define ECAP_GET_CLK_DIV_INDEX(ecap) ((ecap)->CTL1 = ((ecap)->CTL1 & ECAP_CTL1_CLKSEL_Msk)…
227 …return ((float)1000000 / ((float)CLK_GetPCLK0Freq() / u8ClockDivider[(psNuEcap->base->CTL1 & ECAP_… in get_ecap_tick_time_us()
229 …return ((float)1000000 / ((float)CLK_GetPCLK1Freq() / u8ClockDivider[(psNuEcap->base->CTL1 & ECAP_… in get_ecap_tick_time_us()
A Ddrv_i2c.c159 nu_i2c->I2C->CTL1 |= I2C_CTL1_ADDR10EN_Msk; in nu_i2c_send_address()
371 nu_i2c->I2C->CTL1 = 0; /*clear all sub modes like 10 bit mode*/ in nu_i2c_mst_xfer()
/bsp/nuvoton/libraries/m480/rtt_port/
A Ddrv_ecap.c52 #define ECAP_GET_CLK_DIV_INDEX(ecap) ((ecap)->CTL1 = ((ecap)->CTL1 & ECAP_CTL1_CLKSEL_Msk)>>ECAP_CT…
277 …oat)CLK_GetPCLK0Freq() / u8ClockDivider[(nu_capture->ecap_dev->ecap_base->CTL1 & ECAP_CTL1_CLKSEL_… in get_ecap_tick_time_us()
279 …oat)CLK_GetPCLK1Freq() / u8ClockDivider[(nu_capture->ecap_dev->ecap_base->CTL1 & ECAP_CTL1_CLKSEL_… in get_ecap_tick_time_us()
A Ddrv_i2c.c147 nu_i2c->I2C->CTL1 |= I2C_CTL1_ADDR10EN_Msk; in nu_i2c_send_address()
359 nu_i2c->I2C->CTL1 = 0; /*clear all sub modes like 10 bit mode*/ in nu_i2c_mst_xfer()
/bsp/nuvoton/libraries/m2354/rtt_port/
A Ddrv_ecap.c52 #define ECAP_GET_CLK_DIV_INDEX(ecap) ((ecap)->CTL1 = ((ecap)->CTL1 & ECAP_CTL1_CLKSEL_Msk)>>ECAP_CT…
277 …oat)CLK_GetPCLK0Freq() / u8ClockDivider[(nu_capture->ecap_dev->ecap_base->CTL1 & ECAP_CTL1_CLKSEL_… in get_ecap_tick_time_us()
279 …oat)CLK_GetPCLK1Freq() / u8ClockDivider[(nu_capture->ecap_dev->ecap_base->CTL1 & ECAP_CTL1_CLKSEL_… in get_ecap_tick_time_us()
A Ddrv_i2c.c147 nu_i2c->I2C->CTL1 |= I2C_CTL1_ADDR10EN_Msk; in nu_i2c_send_address()
359 nu_i2c->I2C->CTL1 = 0; /*clear all sub modes like 10 bit mode*/ in nu_i2c_mst_xfer()
/bsp/efm32/
A Dmma7455l.h38 #define CTL1 0x18 //24 Control 1 (Read/Write) macro
A Ddev_accel.c381 buf[0] = CTL1; in efm_accel_config()
/bsp/nuvoton/libraries/nuc980/rtt_port/
A Ddrv_i2c.c166 nu_i2c->I2C->CTL1 |= I2C_CTL1_ADDR10EN_Msk; in nu_i2c_send_address()
378 nu_i2c->I2C->CTL1 = 0; /*clear all sub modes like 10 bit mode*/ in nu_i2c_mst_xfer()
/bsp/nuvoton/numaker-m467hj/board/
A Dboard_dev.c207 EBI->CTL1 |= EBI_CTL_CACCESS_Msk; in rt_hw_ssd1963_port()
/bsp/nuvoton/libraries/m031/rtt_port/
A Ddrv_i2c.c295 nu_i2c->I2C->CTL1 = 0; /*clear all sub modes like 10 bit mode*/ in nu_i2c_mst_xfer()
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6800/ip/
A Dhpm_lvb_regs.h19 __RW uint32_t CTL1; /* 0x20: TX_PHY Setting */ member
/bsp/nuvoton/numaker-pfm-m487/board/
A Dboard_dev.c292 EBI->CTL1 |= EBI_CTL1_CACCESS_Msk; in rt_hw_ili9341_port()

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