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Searched refs:CTRL2 (Results 1 – 25 of 110) sorted by relevance

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/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6800/HPM6880/
A Dhpm_enet_soc_drv.h21 ptr->CTRL2 &= ~ENET_CTRL2_ENET0_PHY_INF_SEL_MASK; in enet_intf_selection()
22 ptr->CTRL2 |= ENET_CTRL2_ENET0_PHY_INF_SEL_SET(inf_type); in enet_intf_selection()
35 ptr->CTRL2 |= ENET_CTRL2_ENET0_LPI_IRQ_EN_MASK; in enet_enable_lpi_interrupt()
48 ptr->CTRL2 &= ~ENET_CTRL2_ENET0_LPI_IRQ_EN_MASK; in enet_disable_lpi_interrupt()
78 ptr->CTRL2 |= ENET_CTRL2_ENET0_REFCLK_OE_MASK | ENET_CTRL2_ENET0_RMII_TXCLK_SEL_MASK; in enet_rmii_enable_clock()
81 ptr->CTRL2 |= ENET_CTRL2_ENET0_RMII_TXCLK_SEL_MASK; /* use an external clock */ in enet_rmii_enable_clock()
96 ptr->CTRL2 &= ~ENET_CTRL2_ENET0_RMII_TXCLK_SEL_MASK; in enet_rgmii_enable_clock()
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6E00/HPM6E80/
A Dhpm_enet_soc_drv.h21 ptr->CTRL2 &= ~ENET_CTRL2_ENET0_PHY_INF_SEL_MASK; in enet_intf_selection()
22 ptr->CTRL2 |= ENET_CTRL2_ENET0_PHY_INF_SEL_SET(inf_type); in enet_intf_selection()
35 ptr->CTRL2 |= ENET_CTRL2_ENET0_LPI_IRQ_EN_MASK; in enet_enable_lpi_interrupt()
48 ptr->CTRL2 &= ~ENET_CTRL2_ENET0_LPI_IRQ_EN_MASK; in enet_disable_lpi_interrupt()
78 ptr->CTRL2 |= ENET_CTRL2_ENET0_REFCLK_OE_MASK | ENET_CTRL2_ENET0_RMII_TXCLK_SEL_MASK; in enet_rmii_enable_clock()
81 ptr->CTRL2 |= ENET_CTRL2_ENET0_RMII_TXCLK_SEL_MASK; /* use an external clock */ in enet_rmii_enable_clock()
96 ptr->CTRL2 &= ~ENET_CTRL2_ENET0_RMII_TXCLK_SEL_MASK; in enet_rgmii_enable_clock()
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6300/HPM6360/
A Dhpm_enet_soc_drv.h21 ptr->CTRL2 &= ~ENET_CTRL2_ENET0_PHY_INF_SEL_MASK; in enet_intf_selection()
22 ptr->CTRL2 |= ENET_CTRL2_ENET0_PHY_INF_SEL_SET(inf_type); in enet_intf_selection()
35 ptr->CTRL2 |= ENET_CTRL2_ENET0_LPI_IRQ_EN_MASK; in enet_enable_lpi_interrupt()
48 ptr->CTRL2 &= ~ENET_CTRL2_ENET0_LPI_IRQ_EN_MASK; in enet_disable_lpi_interrupt()
74 ptr->CTRL2 |= ENET_CTRL2_ENET0_REFCLK_OE_MASK | ENET_CTRL2_ENET0_RMII_TXCLK_SEL_MASK; in enet_rmii_enable_clock()
77 ptr->CTRL2 |= ENET_CTRL2_ENET0_RMII_TXCLK_SEL_MASK; /* use an external clock */ in enet_rmii_enable_clock()
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6700/HPM6750/
A Dhpm_enet_soc_drv.h21 HPM_CONCTL->CTRL2 &= ~CONCTL_CTRL2_ENET0_PHY_INTF_SEL_MASK; in enet_intf_selection()
22 HPM_CONCTL->CTRL2 |= CONCTL_CTRL2_ENET0_PHY_INTF_SEL_SET(inf_type); in enet_intf_selection()
38 HPM_CONCTL->CTRL2 |= CONCTL_CTRL2_ENET0_LPI_IRQ_EN_MASK; in enet_enable_lpi_interrupt()
53 HPM_CONCTL->CTRL2 &= ~CONCTL_CTRL2_ENET0_LPI_IRQ_EN_MASK; in enet_disable_lpi_interrupt()
88 … HPM_CONCTL->CTRL2 |= CONCTL_CTRL2_ENET0_REFCLK_OE_MASK | CONCTL_CTRL2_ENET0_RMII_TXCLK_SEL_MASK; in enet_rmii_enable_clock()
91 HPM_CONCTL->CTRL2 |= CONCTL_CTRL2_ENET0_RMII_TXCLK_SEL_MASK; /* use an external clock */ in enet_rmii_enable_clock()
114 HPM_CONCTL->CTRL2 &= ~CONCTL_CTRL2_ENET0_RMII_TXCLK_SEL_MASK; in enet_rgmii_enable_clock()
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/src/
A Dn32l43x_adc.c240 tmpreg1 = ADCx->CTRL2; in ADC_Init()
250 ADCx->CTRL2 = tmpreg1; in ADC_Init()
298 ADCx->CTRL2 |= CTRL2_AD_ON_SET; in ADC_Enable()
303 ADCx->CTRL2 &= CTRL2_AD_ON_RESET; in ADC_Enable()
321 ADCx->CTRL2 |= CTRL2_DMA_SET; in ADC_EnableDMA()
326 ADCx->CTRL2 &= CTRL2_DMA_RESET; in ADC_EnableDMA()
373 ADCx->CTRL2 |= CTRL2_CAL_SET; in ADC_StartCalibration()
650 ADCx->CTRL2 |= CTRL2_EXT_TRIG_SET; in ADC_EnableExternalTrigConv()
749 tmpregister = ADCx->CTRL2; in ADC_ConfigExternalTrigInjectedConv()
755 ADCx->CTRL2 = tmpregister; in ADC_ConfigExternalTrigInjectedConv()
[all …]
A Dn32l43x_usart.c199 tmpregister = USARTx->CTRL2; in USART_Init()
207 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_Init()
293 tmpregister = USARTx->CTRL2; in USART_ClockInit()
304 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_ClockInit()
456 USARTx->CTRL2 &= CTRL2_ADDR_MASK; in USART_SetAddr()
458 USARTx->CTRL2 |= USART_Addr; in USART_SetAddr()
523 USARTx->CTRL2 &= CTRL2_LINBDL_MASK; in USART_ConfigLINBreakDetectLength()
524 USARTx->CTRL2 |= USART_LINBreakDetectLength; in USART_ConfigLINBreakDetectLength()
544 USARTx->CTRL2 |= CTRL2_LINMEN_SET; in USART_EnableLIN()
549 USARTx->CTRL2 &= CTRL2_LINMEN_RESET; in USART_EnableLIN()
[all …]
A Dn32l43x_i2c.c217 tmpregister = I2Cx->CTRL2; in I2C_Init()
227 I2Cx->CTRL2 = tmpregister; in I2C_Init()
368 I2Cx->CTRL2 |= CTRL2_DMAEN_SET; in I2C_EnableDMA()
373 I2Cx->CTRL2 &= CTRL2_DMAEN_RESET; in I2C_EnableDMA()
391 I2Cx->CTRL2 |= CTRL2_DMALAST_SET; in I2C_EnableDmaLastSend()
396 I2Cx->CTRL2 &= CTRL2_DMALAST_RESET; in I2C_EnableDmaLastSend()
561 I2Cx->CTRL2 |= I2C_IT; in I2C_ConfigInt()
566 I2Cx->CTRL2 &= (uint16_t)~I2C_IT; in I2C_ConfigInt()
1229 enablestatus = (uint32_t)(((I2C_IT & INTEN_MASK) >> 16) & (I2Cx->CTRL2)); in I2C_GetIntStatus()
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/src/
A Dn32l40x_adc.c240 tmpreg1 = ADCx->CTRL2; in ADC_Init()
250 ADCx->CTRL2 = tmpreg1; in ADC_Init()
298 ADCx->CTRL2 |= CTRL2_AD_ON_SET; in ADC_Enable()
303 ADCx->CTRL2 &= CTRL2_AD_ON_RESET; in ADC_Enable()
321 ADCx->CTRL2 |= CTRL2_DMA_SET; in ADC_EnableDMA()
326 ADCx->CTRL2 &= CTRL2_DMA_RESET; in ADC_EnableDMA()
373 ADCx->CTRL2 |= CTRL2_CAL_SET; in ADC_StartCalibration()
650 ADCx->CTRL2 |= CTRL2_EXT_TRIG_SET; in ADC_EnableExternalTrigConv()
749 tmpregister = ADCx->CTRL2; in ADC_ConfigExternalTrigInjectedConv()
755 ADCx->CTRL2 = tmpregister; in ADC_ConfigExternalTrigInjectedConv()
[all …]
A Dn32l40x_usart.c199 tmpregister = USARTx->CTRL2; in USART_Init()
207 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_Init()
293 tmpregister = USARTx->CTRL2; in USART_ClockInit()
304 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_ClockInit()
456 USARTx->CTRL2 &= CTRL2_ADDR_MASK; in USART_SetAddr()
458 USARTx->CTRL2 |= USART_Addr; in USART_SetAddr()
523 USARTx->CTRL2 &= CTRL2_LINBDL_MASK; in USART_ConfigLINBreakDetectLength()
524 USARTx->CTRL2 |= USART_LINBreakDetectLength; in USART_ConfigLINBreakDetectLength()
544 USARTx->CTRL2 |= CTRL2_LINMEN_SET; in USART_EnableLIN()
549 USARTx->CTRL2 &= CTRL2_LINMEN_RESET; in USART_EnableLIN()
[all …]
A Dn32l40x_i2c.c217 tmpregister = I2Cx->CTRL2; in I2C_Init()
227 I2Cx->CTRL2 = tmpregister; in I2C_Init()
368 I2Cx->CTRL2 |= CTRL2_DMAEN_SET; in I2C_EnableDMA()
373 I2Cx->CTRL2 &= CTRL2_DMAEN_RESET; in I2C_EnableDMA()
391 I2Cx->CTRL2 |= CTRL2_DMALAST_SET; in I2C_EnableDmaLastSend()
396 I2Cx->CTRL2 &= CTRL2_DMALAST_RESET; in I2C_EnableDmaLastSend()
561 I2Cx->CTRL2 |= I2C_IT; in I2C_ConfigInt()
566 I2Cx->CTRL2 &= (uint16_t)~I2C_IT; in I2C_ConfigInt()
1229 enablestatus = (uint32_t)(((I2C_IT & INTEN_MASK) >> 16) & (I2Cx->CTRL2)); in I2C_GetIntStatus()
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/src/
A Dn32g43x_adc.c240 tmpreg1 = ADCx->CTRL2; in ADC_Init()
250 ADCx->CTRL2 = tmpreg1; in ADC_Init()
298 ADCx->CTRL2 |= CTRL2_AD_ON_SET; in ADC_Enable()
303 ADCx->CTRL2 &= CTRL2_AD_ON_RESET; in ADC_Enable()
321 ADCx->CTRL2 |= CTRL2_DMA_SET; in ADC_EnableDMA()
326 ADCx->CTRL2 &= CTRL2_DMA_RESET; in ADC_EnableDMA()
373 ADCx->CTRL2 |= CTRL2_CAL_SET; in ADC_StartCalibration()
650 ADCx->CTRL2 |= CTRL2_EXT_TRIG_SET; in ADC_EnableExternalTrigConv()
749 tmpregister = ADCx->CTRL2; in ADC_ConfigExternalTrigInjectedConv()
755 ADCx->CTRL2 = tmpregister; in ADC_ConfigExternalTrigInjectedConv()
[all …]
A Dn32g43x_usart.c199 tmpregister = USARTx->CTRL2; in USART_Init()
207 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_Init()
293 tmpregister = USARTx->CTRL2; in USART_ClockInit()
304 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_ClockInit()
456 USARTx->CTRL2 &= CTRL2_ADDR_MASK; in USART_SetAddr()
458 USARTx->CTRL2 |= USART_Addr; in USART_SetAddr()
523 USARTx->CTRL2 &= CTRL2_LINBDL_MASK; in USART_ConfigLINBreakDetectLength()
524 USARTx->CTRL2 |= USART_LINBreakDetectLength; in USART_ConfigLINBreakDetectLength()
544 USARTx->CTRL2 |= CTRL2_LINMEN_SET; in USART_EnableLIN()
549 USARTx->CTRL2 &= CTRL2_LINMEN_RESET; in USART_EnableLIN()
[all …]
A Dn32g43x_i2c.c217 tmpregister = I2Cx->CTRL2; in I2C_Init()
227 I2Cx->CTRL2 = tmpregister; in I2C_Init()
368 I2Cx->CTRL2 |= CTRL2_DMAEN_SET; in I2C_EnableDMA()
373 I2Cx->CTRL2 &= CTRL2_DMAEN_RESET; in I2C_EnableDMA()
391 I2Cx->CTRL2 |= CTRL2_DMALAST_SET; in I2C_EnableDmaLastSend()
396 I2Cx->CTRL2 &= CTRL2_DMALAST_RESET; in I2C_EnableDmaLastSend()
561 I2Cx->CTRL2 |= I2C_IT; in I2C_ConfigInt()
566 I2Cx->CTRL2 &= (uint16_t)~I2C_IT; in I2C_ConfigInt()
1229 enablestatus = (uint32_t)(((I2C_IT & INTEN_MASK) >> 16) & (I2Cx->CTRL2)); in I2C_GetIntStatus()
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_adc.c263 tmpreg1 = ADCx->CTRL2; in ADC_Init()
273 ADCx->CTRL2 = tmpreg1; in ADC_Init()
323 ADCx->CTRL2 |= CTRL2_AD_ON_SET; in ADC_Enable()
328 ADCx->CTRL2 &= CTRL2_AD_ON_RESET; in ADC_Enable()
346 ADCx->CTRL2 |= CTRL2_DMA_SET; in ADC_EnableDMA()
351 ADCx->CTRL2 &= CTRL2_DMA_RESET; in ADC_EnableDMA()
397 ADCx->CTRL2 |= CTRL2_CAL_SET; in ADC_StartCalibration()
674 ADCx->CTRL2 |= CTRL2_EXT_TRIG_SET; in ADC_EnableExternalTrigConv()
789 tmpregister = ADCx->CTRL2; in ADC_ConfigExternalTrigInjectedConv()
795 ADCx->CTRL2 = tmpregister; in ADC_ConfigExternalTrigInjectedConv()
[all …]
A Dn32g45x_usart.c212 tmpregister = USARTx->CTRL2; in USART_Init()
220 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_Init()
311 tmpregister = USARTx->CTRL2; in USART_ClockInit()
322 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_ClockInit()
474 USARTx->CTRL2 &= CTRL2_ADDR_MASK; in USART_SetAddr()
476 USARTx->CTRL2 |= USART_Addr; in USART_SetAddr()
541 USARTx->CTRL2 &= CTRL2_LINBDL_MASK; in USART_ConfigLINBreakDetectLength()
542 USARTx->CTRL2 |= USART_LINBreakDetectLength; in USART_ConfigLINBreakDetectLength()
562 USARTx->CTRL2 |= CTRL2_LINMEN_SET; in USART_EnableLIN()
567 USARTx->CTRL2 &= CTRL2_LINMEN_RESET; in USART_EnableLIN()
[all …]
A Dn32g45x_i2c.c235 tmpregister = I2Cx->CTRL2; in I2C_Init()
258 I2Cx->CTRL2 = tmpregister; in I2C_Init()
391 I2Cx->CTRL2 |= CTRL2_DMAEN_SET; in I2C_EnableDMA()
396 I2Cx->CTRL2 &= CTRL2_DMAEN_RESET; in I2C_EnableDMA()
414 I2Cx->CTRL2 |= CTRL2_DMALAST_SET; in I2C_EnableDmaLastSend()
419 I2Cx->CTRL2 &= CTRL2_DMALAST_RESET; in I2C_EnableDmaLastSend()
584 I2Cx->CTRL2 |= I2C_IT; in I2C_ConfigInt()
589 I2Cx->CTRL2 &= (uint16_t)~I2C_IT; in I2C_ConfigInt()
1252 enablestatus = (uint32_t)(((I2C_IT & INTEN_MASK) >> 16) & (I2Cx->CTRL2)); in I2C_GetIntStatus()
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_adc.c249 tmpreg1 = ADCx->CTRL2; in ADC_Init()
259 ADCx->CTRL2 = tmpreg1; in ADC_Init()
309 ADCx->CTRL2 |= CTRL2_AD_ON_SET; in ADC_Enable()
314 ADCx->CTRL2 &= CTRL2_AD_ON_RESET; in ADC_Enable()
332 ADCx->CTRL2 |= CTRL2_DMA_SET; in ADC_EnableDMA()
337 ADCx->CTRL2 &= CTRL2_DMA_RESET; in ADC_EnableDMA()
385 ADCx->CTRL2 |= CTRL2_CAL_SET; in ADC_StartCalibration()
662 ADCx->CTRL2 |= CTRL2_EXT_TRIG_SET; in ADC_EnableExternalTrigConv()
769 tmpregister = ADCx->CTRL2; in ADC_ConfigExternalTrigInjectedConv()
775 ADCx->CTRL2 = tmpregister; in ADC_ConfigExternalTrigInjectedConv()
[all …]
A Dn32g4fr_usart.c212 tmpregister = USARTx->CTRL2; in USART_Init()
220 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_Init()
311 tmpregister = USARTx->CTRL2; in USART_ClockInit()
322 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_ClockInit()
474 USARTx->CTRL2 &= CTRL2_ADDR_MASK; in USART_SetAddr()
476 USARTx->CTRL2 |= USART_Addr; in USART_SetAddr()
541 USARTx->CTRL2 &= CTRL2_LINBDL_MASK; in USART_ConfigLINBreakDetectLength()
542 USARTx->CTRL2 |= USART_LINBreakDetectLength; in USART_ConfigLINBreakDetectLength()
562 USARTx->CTRL2 |= CTRL2_LINMEN_SET; in USART_EnableLIN()
567 USARTx->CTRL2 &= CTRL2_LINMEN_RESET; in USART_EnableLIN()
[all …]
A Dn32g4fr_i2c.c235 tmpregister = I2Cx->CTRL2; in I2C_Init()
258 I2Cx->CTRL2 = tmpregister; in I2C_Init()
391 I2Cx->CTRL2 |= CTRL2_DMAEN_SET; in I2C_EnableDMA()
396 I2Cx->CTRL2 &= CTRL2_DMAEN_RESET; in I2C_EnableDMA()
414 I2Cx->CTRL2 |= CTRL2_DMALAST_SET; in I2C_EnableDmaLastSend()
419 I2Cx->CTRL2 &= CTRL2_DMALAST_RESET; in I2C_EnableDmaLastSend()
584 I2Cx->CTRL2 |= I2C_IT; in I2C_ConfigInt()
589 I2Cx->CTRL2 &= (uint16_t)~I2C_IT; in I2C_ConfigInt()
1252 enablestatus = (uint32_t)(((I2C_IT & INTEN_MASK) >> 16) & (I2Cx->CTRL2)); in I2C_GetIntStatus()
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/
A Dn32wb452_adc.c249 tmpreg1 = ADCx->CTRL2; in ADC_Init()
259 ADCx->CTRL2 = tmpreg1; in ADC_Init()
309 ADCx->CTRL2 |= CTRL2_AD_ON_SET; in ADC_Enable()
314 ADCx->CTRL2 &= CTRL2_AD_ON_RESET; in ADC_Enable()
332 ADCx->CTRL2 |= CTRL2_DMA_SET; in ADC_EnableDMA()
337 ADCx->CTRL2 &= CTRL2_DMA_RESET; in ADC_EnableDMA()
384 ADCx->CTRL2 |= CTRL2_CAL_SET; in ADC_StartCalibration()
661 ADCx->CTRL2 |= CTRL2_EXT_TRIG_SET; in ADC_EnableExternalTrigConv()
768 tmpregister = ADCx->CTRL2; in ADC_ConfigExternalTrigInjectedConv()
774 ADCx->CTRL2 = tmpregister; in ADC_ConfigExternalTrigInjectedConv()
[all …]
A Dn32wb452_usart.c212 tmpregister = USARTx->CTRL2; in USART_Init()
220 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_Init()
311 tmpregister = USARTx->CTRL2; in USART_ClockInit()
322 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_ClockInit()
474 USARTx->CTRL2 &= CTRL2_ADDR_MASK; in USART_SetAddr()
476 USARTx->CTRL2 |= USART_Addr; in USART_SetAddr()
541 USARTx->CTRL2 &= CTRL2_LINBDL_MASK; in USART_ConfigLINBreakDetectLength()
542 USARTx->CTRL2 |= USART_LINBreakDetectLength; in USART_ConfigLINBreakDetectLength()
562 USARTx->CTRL2 |= CTRL2_LINMEN_SET; in USART_EnableLIN()
567 USARTx->CTRL2 &= CTRL2_LINMEN_RESET; in USART_EnableLIN()
[all …]
A Dn32wb452_i2c.c235 tmpregister = I2Cx->CTRL2; in I2C_Init()
258 I2Cx->CTRL2 = tmpregister; in I2C_Init()
391 I2Cx->CTRL2 |= CTRL2_DMAEN_SET; in I2C_EnableDMA()
396 I2Cx->CTRL2 &= CTRL2_DMAEN_RESET; in I2C_EnableDMA()
414 I2Cx->CTRL2 |= CTRL2_DMALAST_SET; in I2C_EnableDmaLastSend()
419 I2Cx->CTRL2 &= CTRL2_DMALAST_RESET; in I2C_EnableDmaLastSend()
584 I2Cx->CTRL2 |= I2C_IT; in I2C_ConfigInt()
589 I2Cx->CTRL2 &= (uint16_t)~I2C_IT; in I2C_ConfigInt()
1252 enablestatus = (uint32_t)(((I2C_IT & INTEN_MASK) >> 16) & (I2Cx->CTRL2)); in I2C_GetIntStatus()
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/
A Dn32g45x_adc.c260 tmpreg1 = ADCx->CTRL2; in ADC_Init()
270 ADCx->CTRL2 = tmpreg1; in ADC_Init()
320 ADCx->CTRL2 |= CTRL2_AD_ON_SET; in ADC_Enable()
325 ADCx->CTRL2 &= CTRL2_AD_ON_RESET; in ADC_Enable()
343 ADCx->CTRL2 |= CTRL2_DMA_SET; in ADC_EnableDMA()
348 ADCx->CTRL2 &= CTRL2_DMA_RESET; in ADC_EnableDMA()
393 ADCx->CTRL2 |= CTRL2_CAL_SET; in ADC_StartCalibration()
668 ADCx->CTRL2 |= CTRL2_EXT_TRIG_SET; in ADC_EnableExternalTrigConv()
783 tmpregister = ADCx->CTRL2; in ADC_ConfigExternalTrigInjectedConv()
789 ADCx->CTRL2 = tmpregister; in ADC_ConfigExternalTrigInjectedConv()
[all …]
A Dn32g45x_usart.c212 tmpregister = USARTx->CTRL2; in USART_Init()
220 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_Init()
306 tmpregister = USARTx->CTRL2; in USART_ClockInit()
317 USARTx->CTRL2 = (uint16_t)tmpregister; in USART_ClockInit()
469 USARTx->CTRL2 &= CTRL2_ADDR_MASK; in USART_SetAddr()
471 USARTx->CTRL2 |= USART_Addr; in USART_SetAddr()
536 USARTx->CTRL2 &= CTRL2_LINBDL_MASK; in USART_ConfigLINBreakDetectLength()
537 USARTx->CTRL2 |= USART_LINBreakDetectLength; in USART_ConfigLINBreakDetectLength()
557 USARTx->CTRL2 |= CTRL2_LINMEN_SET; in USART_EnableLIN()
562 USARTx->CTRL2 &= CTRL2_LINMEN_RESET; in USART_EnableLIN()
[all …]
/bsp/asm9260t/platform/
A Duart.c18 uartBase->CTRL2[R_CLR] = ASM_UART_CTRL2_TXE | ASM_UART_CTRL2_RXE; in Hw_UartDisable()
23 uartBase->CTRL2[R_CLR] = 0x0000C000UL; //clear CTSEN and RTSEN in Hw_UartEnable()
24 uartBase->CTRL2[R_SET] = ASM_UART_CTRL2_TXE | ASM_UART_CTRL2_RXE | ASM_UART_CTRL2_USARTEN; in Hw_UartEnable()

Completed in 1994 milliseconds

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