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Searched refs:CTRL5 (Results 1 – 3 of 3) sorted by relevance

/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6700/HPM6750/
A Dhpm_sdxc_soc_drv.h23 volatile uint32_t *reg = (base == HPM_SDXC0) ? &HPM_CONCTL->CTRL4 : &HPM_CONCTL->CTRL5; in sdxc_enable_tm_clock()
48 volatile uint32_t *reg = (base == HPM_SDXC0) ? &HPM_CONCTL->CTRL4 : &HPM_CONCTL->CTRL5; in sdxc_enable_inverse_clock()
58 volatile uint32_t *reg = (base == HPM_SDXC0) ? &HPM_CONCTL->CTRL4 : &HPM_CONCTL->CTRL5; in sdxc_is_inverse_clock_enabled()
71 volatile uint32_t *reg = (base == HPM_SDXC0) ? &HPM_CONCTL->CTRL4 : &HPM_CONCTL->CTRL5; in sdxc_set_cardclk_delay_chain()
79 volatile uint32_t *reg = (base == HPM_SDXC0) ? &HPM_CONCTL->CTRL4 : &HPM_CONCTL->CTRL5; in sdxc_set_data_strobe_delay()
94 volatile uint32_t *reg = (base == HPM_SDXC0) ? &HPM_CONCTL->CTRL4 : &HPM_CONCTL->CTRL5; in sdxc_set_rxclk_delay_chain()
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6700/ip/
A Dhpm_conctl_regs.h18 __RW uint32_t CTRL5; /* 0x14: */ member
/bsp/at91/at91sam9g45/platform/
A Dat91sam9g45.h955 #define CTRL5 (AT91C_CAST(AT91C_REG *) 0x0000005C) // (CTRL5) Control Register for CS 5 macro

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