Home
last modified time | relevance | path

Searched refs:CTRLSTS_OFFSET (Results 1 – 18 of 18) sorted by relevance

/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/
A Dn32wb452_bkp.c75 #define CTRLSTS_OFFSET (BKP_OFFSET + 0x34) macro
77 #define CTRLSTS_TPINT_EN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (TPINT_EN_BIT * 4))
81 #define CTRLSTS_TINTF_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (TINTF_BIT * 4))
85 #define CTRLSTS_TEF_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (TEF_BIT * 4))
A Dn32wb452_pwr.c75 #define CTRLSTS_OFFSET (PWR_OFFSET + 0x04) macro
77 #define CTRLSTS_WKUPEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (WKUPEN_BITN * 4))
A Dn32wb452_rcc.c101 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24) macro
103 #define CTRLSTS_LSIEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (LSIEN_BITNUMBER * 4))
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_bkp.c75 #define CTRLSTS_OFFSET (BKP_OFFSET + 0x34) macro
77 #define CTRLSTS_TPINT_EN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (TPINT_EN_BIT * 4))
81 #define CTRLSTS_TINTF_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (TINTF_BIT * 4))
85 #define CTRLSTS_TEF_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (TEF_BIT * 4))
A Dn32g4fr_pwr.c75 #define CTRLSTS_OFFSET (PWR_OFFSET + 0x04) macro
77 #define CTRLSTS_WKUPEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (WKUPEN_BITN * 4))
A Dn32g4fr_rcc.c101 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24) macro
103 #define CTRLSTS_LSIEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (LSIEN_BITNUMBER * 4))
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_bkp.c75 #define CTRLSTS_OFFSET (BKP_OFFSET + 0x34) macro
77 #define CTRLSTS_TPINT_EN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (TPINT_EN_BIT * 4))
81 #define CTRLSTS_TINTF_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (TINTF_BIT * 4))
85 #define CTRLSTS_TEF_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (TEF_BIT * 4))
A Dn32g45x_pwr.c75 #define CTRLSTS_OFFSET (PWR_OFFSET + 0x04) macro
77 #define CTRLSTS_WKUPEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (WKUPEN_BITN * 4))
A Dn32g45x_rcc.c101 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24) macro
103 #define CTRLSTS_LSIEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (LSIEN_BITNUMBER * 4))
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/
A Dn32g45x_bkp.c75 #define CTRLSTS_OFFSET (BKP_OFFSET + 0x34) macro
77 #define CTRLSTS_TPINT_EN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (TPINT_EN_BIT * 4))
81 #define CTRLSTS_TINTF_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (TINTF_BIT * 4))
85 #define CTRLSTS_TEF_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (TEF_BIT * 4))
A Dn32g45x_pwr.c75 #define CTRLSTS_OFFSET (PWR_OFFSET + 0x04) macro
77 #define CTRLSTS_WKUPEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (WKUPEN_BITN * 4))
A Dn32g45x_rcc.c101 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24) macro
103 #define CTRLSTS_LSIEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (LSIEN_BITNUMBER * 4))
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/src/
A Dn32l43x_pwr.c75 #define CTRLSTS_OFFSET (PWR_OFFSET + 0x04) macro
77 #define CTRLSTS_WKUPEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (WKUPEN_BITN * 4))
A Dn32l43x_rcc.c113 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24) macro
115 #define CTRLSTS_LSIEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (LSIEN_BITNUMBER * 4))
119 #define CTRLSTS_MSIEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (MSIEN_BITNUMBER * 4))
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/src/
A Dn32l40x_pwr.c75 #define CTRLSTS_OFFSET (PWR_OFFSET + 0x04) macro
77 #define CTRLSTS_WKUPEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (WKUPEN_BITN * 4))
A Dn32l40x_rcc.c113 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24) macro
115 #define CTRLSTS_LSIEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (LSIEN_BITNUMBER * 4))
119 #define CTRLSTS_MSIEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (MSIEN_BITNUMBER * 4))
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/src/
A Dn32g43x_pwr.c75 #define CTRLSTS_OFFSET (PWR_OFFSET + 0x04) macro
77 #define CTRLSTS_WKUPEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (WKUPEN_BITN * 4))
A Dn32g43x_rcc.c113 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24) macro
115 #define CTRLSTS_LSIEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (LSIEN_BITNUMBER * 4))
119 #define CTRLSTS_MSIEN_BB (PERIPH_BB_BASE + (CTRLSTS_OFFSET * 32) + (MSIEN_BITNUMBER * 4))

Completed in 53 milliseconds